board/isee/igep00x0/igep00x0.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2010
   4  * ISEE 2007 SL, <www.iseebcn.com>
   5  */
   6 #include <common.h>
   7 #include <env.h>
   8 #include <malloc.h>
   9 #include <status_led.h>
  10 #include <dm.h>
  11 #include <ns16550.h>
  12 #include <twl4030.h>
  13 #include <netdev.h>
  14 #include <spl.h>
  15 #include <asm/gpio.h>
  16 #include <asm/io.h>
  17 #include <asm/arch/mem.h>
  18 #include <asm/arch/mmc_host_def.h>
  19 #include <asm/arch/mux.h>
  20 #include <asm/arch/sys_proto.h>
  21 #include <linux/mtd/mtd.h>
  22 #include <linux/mtd/rawnand.h>
  23 #include <linux/mtd/onenand.h>
  24 #include <jffs2/load_kernel.h>
  25 #include <mtd_node.h>
  26 #include <fdt_support.h>
  27 #include "igep00x0.h"
  28
  29 static const struct ns16550_platdata igep_serial = {
  30         .base = OMAP34XX_UART3,
  31         .reg_shift = 2,
  32         .clock = V_NS16550_CLK,
  33         .fcr = UART_FCR_DEFVAL,
  34 };
  35
  36 U_BOOT_DEVICE(igep_uart) = {
  37         "ns16550_serial",
  38         &igep_serial
  39 };
  40
  41 /*
  42  * Routine: get_board_revision
  43  * Description: GPIO_28 and GPIO_129 are used to read board and revision from
  44  * IGEP00x0 boards. First of all, it is necessary to reset USB transceiver from
  45  * IGEP0030 in order to read GPIO_IGEP00X0_BOARD_DETECTION correctly, because
  46  * this functionality is shared by USB HOST.
  47  * Once USB reset is applied, U-boot configures these pins as input pullup to
  48  * detect board and revision:
  49  * IGEP0020-RF = 0b00
  50  * IGEP0020-RC = 0b01
  51  * IGEP0030-RG = 0b10
  52  * IGEP0030-RE = 0b11
  53  */
  54 static int get_board_revision(void)
  55 {
  56         int revision;
  57
  58         gpio_request(IGEP0030_USB_TRANSCEIVER_RESET,
  59                                 "igep0030_usb_transceiver_reset");
  60         gpio_direction_output(IGEP0030_USB_TRANSCEIVER_RESET, 0);
  61
  62         gpio_request(GPIO_IGEP00X0_BOARD_DETECTION, "igep00x0_board_detection");
  63         gpio_direction_input(GPIO_IGEP00X0_BOARD_DETECTION);
  64         revision = 2 * gpio_get_value(GPIO_IGEP00X0_BOARD_DETECTION);
  65         gpio_free(GPIO_IGEP00X0_BOARD_DETECTION);
  66
  67         gpio_request(GPIO_IGEP00X0_REVISION_DETECTION,
  68                                 "igep00x0_revision_detection");
  69         gpio_direction_input(GPIO_IGEP00X0_REVISION_DETECTION);
  70         revision = revision + gpio_get_value(GPIO_IGEP00X0_REVISION_DETECTION);
  71         gpio_free(GPIO_IGEP00X0_REVISION_DETECTION);
  72
  73         gpio_free(IGEP0030_USB_TRANSCEIVER_RESET);
  74
  75         return revision;
  76 }
  77
  78 int onenand_board_init(struct mtd_info *mtd)
  79 {
  80         if (gpmc_cs0_flash == MTD_DEV_TYPE_ONENAND) {
  81                 struct onenand_chip *this = mtd->priv;
  82                 this->base = (void *)CONFIG_SYS_ONENAND_BASE;
  83                 return 0;
  84         }
  85         return 1;
  86 }
  87
  88 #if defined(CONFIG_CMD_NET)
  89 static void reset_net_chip(int gpio)
  90 {
  91         if (!gpio_request(gpio, "eth nrst")) {
  92                 gpio_direction_output(gpio, 1);
  93                 udelay(1);
  94                 gpio_set_value(gpio, 0);
  95                 udelay(40);
  96                 gpio_set_value(gpio, 1);
  97                 mdelay(10);
  98         }
  99 }
 100
 101 /*
 102  * Routine: setup_net_chip
 103  * Description: Setting up the configuration GPMC registers specific to the
 104  *              Ethernet hardware.
 105  */
 106 static void setup_net_chip(void)
 107 {
 108         struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
 109         static const u32 gpmc_lan_config[] = {
 110                 NET_LAN9221_GPMC_CONFIG1,
 111                 NET_LAN9221_GPMC_CONFIG2,
 112                 NET_LAN9221_GPMC_CONFIG3,
 113                 NET_LAN9221_GPMC_CONFIG4,
 114                 NET_LAN9221_GPMC_CONFIG5,
 115                 NET_LAN9221_GPMC_CONFIG6,
 116         };
 117
 118         enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[5],
 119                         CONFIG_SMC911X_BASE, GPMC_SIZE_16M);
 120
 121         /* Enable off mode for NWE in PADCONF_GPMC_NWE register */
 122         writew(readw(&ctrl_base->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
 123         /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
 124         writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
 125         /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
 126         writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
 127                 &ctrl_base->gpmc_nadv_ale);
 128
 129         reset_net_chip(64);
 130 }
 131
 132 int board_eth_init(bd_t *bis)
 133 {
 134 #ifdef CONFIG_SMC911X
 135         return smc911x_initialize(0, CONFIG_SMC911X_BASE);
 136 #else
 137         return 0;
 138 #endif
 139 }
 140 #else
 141 static inline void setup_net_chip(void) {}
 142 #endif
 143
 144 #ifdef CONFIG_OF_BOARD_SETUP
 145 static int ft_enable_by_compatible(void *blob, char *compat, int enable)
 146 {
 147         int off = fdt_node_offset_by_compatible(blob, -1, compat);
 148         if (off < 0)
 149                 return off;
 150
 151         if (enable)
 152                 fdt_status_okay(blob, off);
 153         else
 154                 fdt_status_disabled(blob, off);
 155
 156         return 0;
 157 }
 158
 159 int ft_board_setup(void *blob, bd_t *bd)
 160 {
 161 #ifdef CONFIG_FDT_FIXUP_PARTITIONS
 162         static const struct node_info nodes[] = {
 163                 { "ti,omap2-nand", MTD_DEV_TYPE_NAND, },
 164                 { "ti,omap2-onenand", MTD_DEV_TYPE_ONENAND, },
 165         };
 166
 167         fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
 168 #endif
 169         ft_enable_by_compatible(blob, "ti,omap2-nand",
 170                                 gpmc_cs0_flash == MTD_DEV_TYPE_NAND);
 171         ft_enable_by_compatible(blob, "ti,omap2-onenand",
 172                                 gpmc_cs0_flash == MTD_DEV_TYPE_ONENAND);
 173
 174         return 0;
 175 }
 176 #endif
 177
 178 void set_led(void)
 179 {
 180         switch (get_board_revision()) {
 181         case 0:
 182         case 1:
 183                 gpio_request(IGEP0020_GPIO_LED, "igep0020_gpio_led");
 184                 gpio_direction_output(IGEP0020_GPIO_LED, 1);
 185                 break;
 186         case 2:
 187         case 3:
 188                 gpio_request(IGEP0030_GPIO_LED, "igep0030_gpio_led");
 189                 gpio_direction_output(IGEP0030_GPIO_LED, 0);
 190                 break;
 191         default:
 192                 /* Should not happen... */
 193                 break;
 194         }
 195 }
 196
 197 void set_boardname(void)
 198 {
 199         char rev[5] = { 'F','C','G','E', };
 200         int i = get_board_revision();
 201
 202         rev[i+1] = 0;
 203         env_set("board_rev", rev + i);
 204         env_set("board_name", i < 2 ? "igep0020" : "igep0030");
 205 }
 206
 207 /*
 208  * Routine: misc_init_r
 209  * Description: Configure board specific parts
 210  */
 211 int misc_init_r(void)
 212 {
 213         t2_t *t2_base = (t2_t *)T2_BASE;
 214         u32 pbias_lite;
 215
 216         twl4030_power_init();
 217
 218         /* set VSIM to 1.8V */
 219         twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VSIM_DEDICATED,
 220                                 TWL4030_PM_RECEIVER_VSIM_VSEL_18,
 221                                 TWL4030_PM_RECEIVER_VSIM_DEV_GRP,
 222                                 TWL4030_PM_RECEIVER_DEV_GRP_P1);
 223
 224         /* set up dual-voltage GPIOs to 1.8V */
 225         pbias_lite = readl(&t2_base->pbias_lite);
 226         pbias_lite &= ~PBIASLITEVMODE1;
 227         pbias_lite |= PBIASLITEPWRDNZ1;
 228         writel(pbias_lite, &t2_base->pbias_lite);
 229         if (get_cpu_family() == CPU_OMAP36XX)
 230                 writel(readl(OMAP34XX_CTRL_WKUP_CTRL) |
 231                                          OMAP34XX_CTRL_WKUP_CTRL_GPIO_IO_PWRDNZ,
 232                                          OMAP34XX_CTRL_WKUP_CTRL);
 233
 234         setup_net_chip();
 235
 236         omap_die_id_display();
 237
 238         set_led();
 239
 240         set_boardname();
 241
 242         return 0;
 243 }
 244
 245 void board_mtdparts_default(const char **mtdids, const char **mtdparts)
 246 {
 247         struct mtd_info *mtd = get_mtd_device(NULL, 0);
 248         if (mtd) {
 249                 static char ids[24];
 250                 static char parts[48];
 251                 const char *linux_name = "omap2-nand";
 252                 if (strncmp(mtd->name, "onenand0", 8) == 0)
 253                         linux_name = "omap2-onenand";
 254                 snprintf(ids, sizeof(ids), "%s=%s", mtd->name, linux_name);
 255                 snprintf(parts, sizeof(parts), "mtdparts=%s:%dk(SPL),-(UBI)",
 256                          linux_name, 4 * mtd->erasesize >> 10);
 257                 *mtdids = ids;
 258                 *mtdparts = parts;
 259         }
 260 }