board/hymod/flash.h

   1 /*
   2  * (C) Copyright 2000
   3  * Murray Jensen, CSIRO-MIT, <Murray.Jensen@csiro.au>
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 /*************** DEFINES for Intel StrataFlash FLASH chip ********************/
   9
  10 /* Commands */
  11 #define ISF_CMD_RST             0xFF            /* reset flash */
  12 #define ISF_CMD_RD_ID           0x90            /* read the id and lock bits */
  13 #define ISF_CMD_RD_QUERY        0x98            /* read device capabilities */
  14 #define ISF_CMD_RD_STAT         0x70            /* read the status register */
  15 #define ISF_CMD_CLR_STAT        0x50            /* clear the staus register */
  16 #define ISF_CMD_WR_BUF          0xE8            /* clear the staus register */
  17 #define ISF_CMD_PROG            0x40            /* program word command */
  18 #define ISF_CMD_ERASE1          0x20            /* 1st word for block erase */
  19 #define ISF_CMD_ERASE2          0xD0            /* 2nd word for block erase */
  20 #define ISF_CMD_ERASE_SUSP      0xB0            /* suspend block erase */
  21 #define ISF_CMD_LOCK            0x60            /* 1st word for all lock cmds */
  22 #define ISF_CMD_SET_LOCK_BLK    0x01            /* 2nd wrd set block lock bit */
  23 #define ISF_CMD_SET_LOCK_MSTR   0xF1            /* 2nd wrd set master lck bit */
  24 #define ISF_CMD_CLR_LOCK_BLK    0xD0            /* 2nd wrd clear blk lck bit */
  25
  26 /* status register bits */
  27 #define ISF_STAT_DPS            0x02            /* Device Protect Status */
  28 #define ISF_STAT_VPPS           0x08            /* VPP Status */
  29 #define ISF_STAT_PSLBS          0x10            /* Program+Set Lock Bit Stat */
  30 #define ISF_STAT_ECLBS          0x20            /* Erase+Clr Lock Bit Stat */
  31 #define ISF_STAT_ESS            0x40            /* Erase Suspend Status */
  32 #define ISF_STAT_RDY            0x80            /* WSM Mach Status, 1=rdy */
  33
  34 #define ISF_STAT_ERR            (ISF_STAT_VPPS | ISF_STAT_DPS | \
  35                                     ISF_STAT_ECLBS | ISF_STAT_PSLBS)
  36
  37 /* register addresses, valid only following an ISF_CMD_RD_ID command */
  38 #define ISF_REG_MAN_CODE        0x00            /* manufacturer code */
  39 #define ISF_REG_DEV_CODE        0x01            /* device code */
  40 #define ISF_REG_BLK_LCK         0x02            /* block lock configuration */
  41 #define ISF_REG_MST_LCK         0x03            /* master lock configuration */
  42
  43 /********************** DEFINES for Hymod Flash ******************************/
  44
  45 /*
  46  * this code requires that the flash on any Hymod board appear as a bank
  47  * of two (identical) 16bit Intel StrataFlash chips with 64Kword erase
  48  * sectors (or blocks), running in x16 bit mode and connected side-by-side
  49  * to make a 32-bit wide bus.
  50  */
  51
  52 typedef unsigned long bank_word_t;
  53 typedef bank_word_t bank_blk_t[64 * 1024];
  54
  55 #define BANK_FILL_WORD(b)       (((bank_word_t)(b) << 16) | (bank_word_t)(b))
  56
  57 #ifdef EXAMPLE
  58
  59 /* theoretically the following examples should also work */
  60
  61 /* one flash chip in x8 mode with 128Kword sectors and 8bit bus */
  62 typedef unsigned char bank_word_t;
  63 typedef bank_word_t bank_blk_t[128 * 1024];
  64 #define BANK_FILL_WORD(b)       ((bank_word_t)(b))
  65
  66 /* four flash chips in x16 mode with 32Kword sectors and 64bit bus */
  67 typedef unsigned long long bank_word_t;
  68 typedef bank_word_t bank_blk_t[32 * 1024];
  69 #define BANK_FILL_WORD(b)       ( \
  70                                     ((bank_word_t)(b) << 48) \
  71                                     ((bank_word_t)(b) << 32) \
  72                                     ((bank_word_t)(b) << 16) \
  73                                     ((bank_word_t)(b) <<  0) \
  74                                 )
  75
  76 #endif /* EXAMPLE */
  77
  78 /* the sizes of these two types should probably be the same */
  79 typedef bank_word_t *bank_addr_t;
  80 typedef unsigned long bank_size_t;
  81
  82 /* align bank addresses and sizes to bank word boundaries */
  83 #define BANK_ADDR_WORD_ALIGN(a) ((bank_addr_t)((bank_size_t)(a) \
  84                                     & ~(sizeof (bank_word_t) - 1)))
  85 #define BANK_SIZE_WORD_ALIGN(s) (((bank_size_t)(s) + sizeof (bank_word_t) - 1) \
  86                                     & ~(sizeof (bank_word_t) - 1))
  87
  88 /* align bank addresses and sizes to bank block boundaries */
  89 #define BANK_ADDR_BLK_ALIGN(a)  ((bank_addr_t)((bank_size_t)(a) \
  90                                     & ~(sizeof (bank_blk_t) - 1)))
  91 #define BANK_SIZE_BLK_ALIGN(s)  (((bank_size_t)(s) + sizeof (bank_blk_t) - 1) \
  92                                     & ~(sizeof (bank_blk_t) - 1))
  93
  94 /* add an offset to a bank address */
  95 #define BANK_ADDR_OFFSET(a, o)  ((bank_addr_t)((bank_size_t)(a) + \
  96                                     (bank_size_t)(o)))
  97
  98 /* adjust a bank address to start of next word, block or bank */
  99 #define BANK_ADDR_NEXT_WORD(a)  BANK_ADDR_OFFSET(BANK_ADDR_WORD_ALIGN(a), \
 100                                     sizeof (bank_word_t))
 101 #define BANK_ADDR_NEXT_BLK(a)   BANK_ADDR_OFFSET(BANK_ADDR_BLK_ALIGN(a), \
 102                                     sizeof (bank_blk_t))
 103
 104 /* get bank address of register r given a bank base address a and block num b */
 105 #define BANK_ADDR_REG(a, b, r)  BANK_ADDR_OFFSET(BANK_ADDR_OFFSET((a), \
 106                                     (bank_size_t)(b) * sizeof (bank_blk_t)), \
 107                                         (bank_size_t)(r) * sizeof (bank_word_t))
 108
 109 /* make a bank word value for each StrataFlash value */
 110
 111 /* Commands */
 112 #define BANK_CMD_RST            BANK_FILL_WORD(ISF_CMD_RST)
 113 #define BANK_CMD_RD_ID          BANK_FILL_WORD(ISF_CMD_RD_ID)
 114 #define BANK_CMD_RD_STAT        BANK_FILL_WORD(ISF_CMD_RD_STAT)
 115 #define BANK_CMD_CLR_STAT       BANK_FILL_WORD(ISF_CMD_CLR_STAT)
 116 #define BANK_CMD_ERASE1         BANK_FILL_WORD(ISF_CMD_ERASE1)
 117 #define BANK_CMD_ERASE2         BANK_FILL_WORD(ISF_CMD_ERASE2)
 118 #define BANK_CMD_PROG           BANK_FILL_WORD(ISF_CMD_PROG)
 119 #define BANK_CMD_LOCK           BANK_FILL_WORD(ISF_CMD_LOCK)
 120 #define BANK_CMD_SET_LOCK_BLK   BANK_FILL_WORD(ISF_CMD_SET_LOCK_BLK)
 121 #define BANK_CMD_SET_LOCK_MSTR  BANK_FILL_WORD(ISF_CMD_SET_LOCK_MSTR)
 122 #define BANK_CMD_CLR_LOCK_BLK   BANK_FILL_WORD(ISF_CMD_CLR_LOCK_BLK)
 123
 124 /* status register bits */
 125 #define BANK_STAT_DPS           BANK_FILL_WORD(ISF_STAT_DPS)
 126 #define BANK_STAT_PSS           BANK_FILL_WORD(ISF_STAT_PSS)
 127 #define BANK_STAT_VPPS          BANK_FILL_WORD(ISF_STAT_VPPS)
 128 #define BANK_STAT_PSLBS         BANK_FILL_WORD(ISF_STAT_PSLBS)
 129 #define BANK_STAT_ECLBS         BANK_FILL_WORD(ISF_STAT_ECLBS)
 130 #define BANK_STAT_ESS           BANK_FILL_WORD(ISF_STAT_ESS)
 131 #define BANK_STAT_RDY           BANK_FILL_WORD(ISF_STAT_RDY)
 132
 133 #define BANK_STAT_ERR           BANK_FILL_WORD(ISF_STAT_ERR)
 134
 135 /* make a bank register address for each StrataFlash register address */
 136
 137 #define BANK_REG_MAN_CODE(a)    BANK_ADDR_REG((a), 0, ISF_REG_MAN_CODE)
 138 #define BANK_REG_DEV_CODE(a)    BANK_ADDR_REG((a), 0, ISF_REG_DEV_CODE)
 139 #define BANK_REG_BLK_LCK(a, b)  BANK_ADDR_REG((a), (b), ISF_REG_BLK_LCK)
 140 #define BANK_REG_MST_LCK(a)     BANK_ADDR_REG((a), 0, ISF_REG_MST_LCK)