1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018 Google
10 #ifdef CONFIG_SPL_BUILD
11 /* provided to defeat compiler optimisation in board_init_f() */
12 void gru_dummy_function(int i)
16 int board_early_init_f(void)
18 # ifdef CONFIG_TARGET_CHROMEBOOK_BOB
22 * Add a delay and ensure that the compiler does not optimise this out.
23 * This is needed since the power rails tail a while to turn on, and
24 * we get garbage serial output otherwise.
27 for (i = 0; i < 150000; i++)
29 gru_dummy_function(sum);
30 #endif /* CONFIG_TARGET_CHROMEBOOK_BOB */
36 #ifndef CONFIG_SPL_BUILD
37 int board_early_init_r(void)
43 * This init is done in SPL, but when chain-loading U-Boot SPL will
44 * have been skipped. Allow the clock driver to check if it needs
47 ret = uclass_get_device_by_driver(UCLASS_CLK,
48 DM_GET_DRIVER(clk_rk3399), &clk);
50 debug("%s: CLK init failed: %d\n", __func__, ret);