1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2007 Freescale Semiconductor, Inc.
4 * Copyright (C) 2010 Ilya Yanok, Emcraft Systems, yanok@emcraft.com
6 * Authors: Nick.Spence@freescale.com
7 * Wilson.Lo@freescale.com
8 * scottwood@freescale.com
10 * This files is mostly identical to the original from
11 * board\freescale\mpc8315erdb\sdram.c
14 #ifndef CONFIG_MPC83XX_SDRAM
19 #include <spd_sdram.h>
21 #include <asm/bitops.h>
22 #include <asm/global_data.h>
25 #include <asm/processor.h>
27 DECLARE_GLOBAL_DATA_PTR;
29 /* Fixed sdram init -- doesn't use serial presence detect.
31 * This is useful for faster booting in configs where the RAM is unlikely
32 * to be changed, or for things like NAND booting where space is tight.
34 static long fixed_sdram(void)
36 immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
37 u32 msize = CONFIG_SYS_DDR_SIZE * 1024 * 1024;
38 u32 msize_log2 = __ilog2(msize);
40 out_be32(&im->sysconf.ddrlaw[0].bar,
41 CONFIG_SYS_SDRAM_BASE & 0xfffff000);
42 out_be32(&im->sysconf.ddrlaw[0].ar, LBLAWAR_EN | (msize_log2 - 1));
43 out_be32(&im->sysconf.ddrcdr, CONFIG_SYS_DDRCDR_VALUE);
45 out_be32(&im->ddr.csbnds[0].csbnds, (msize - 1) >> 24);
46 out_be32(&im->ddr.cs_config[0], CONFIG_SYS_DDR_CS0_CONFIG);
48 /* Currently we use only one CS, so disable the other bank. */
49 out_be32(&im->ddr.cs_config[1], 0);
51 out_be32(&im->ddr.sdram_clk_cntl, CONFIG_SYS_DDR_SDRAM_CLK_CNTL);
52 out_be32(&im->ddr.timing_cfg_3, CONFIG_SYS_DDR_TIMING_3);
53 out_be32(&im->ddr.timing_cfg_1, CONFIG_SYS_DDR_TIMING_1);
54 out_be32(&im->ddr.timing_cfg_2, CONFIG_SYS_DDR_TIMING_2);
55 out_be32(&im->ddr.timing_cfg_0, CONFIG_SYS_DDR_TIMING_0);
57 out_be32(&im->ddr.sdram_cfg, CONFIG_SYS_DDR_SDRAM_CFG);
58 out_be32(&im->ddr.sdram_cfg2, CONFIG_SYS_DDR_SDRAM_CFG2);
59 out_be32(&im->ddr.sdram_mode, CONFIG_SYS_DDR_MODE);
60 out_be32(&im->ddr.sdram_mode2, CONFIG_SYS_DDR_MODE2);
62 out_be32(&im->ddr.sdram_interval, CONFIG_SYS_DDR_INTERVAL);
65 /* enable DDR controller */
66 setbits_be32(&im->ddr.sdram_cfg, SDRAM_CFG_MEM_EN);
69 return get_ram_size(CONFIG_SYS_SDRAM_BASE, msize);
74 immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
77 if ((in_be32(&im->sysconf.immrbar) & IMMRBAR_BASE_ADDR) != (u32)im)
81 msize = fixed_sdram();
83 /* return total bus SDRAM size(bytes) -- DDR */
89 #endif /* !CONFIG_MPC83XX_SDRAM */