1 // SPDX-License-Identifier: GPL-2.0+
4 * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
10 #include <asm/processor.h>
12 #include <asm/global_data.h>
15 #include <gdsys_fpga.h>
17 #define REFLECTION_TESTPATTERN 0xdede
18 #define REFLECTION_TESTPATTERN_INV (~REFLECTION_TESTPATTERN & 0xffff)
20 #ifdef CONFIG_SYS_FPGA_NO_RFL_HI
21 #define REFLECTION_TESTREG reflection_low
23 #define REFLECTION_TESTREG reflection_high
26 DECLARE_GLOBAL_DATA_PTR;
28 #ifdef CONFIG_GDSYS_LEGACY_DRIVERS
29 /* as gpio output status cannot be read back, we have to buffer it locally */
32 void setbits_gpio0_out(u32 mask)
34 immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
37 out_be32(&immr->gpio[0].dat, gpio0_out);
40 void clrbits_gpio0_out(u32 mask)
42 immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
45 out_be32(&immr->gpio[0].dat, gpio0_out);
48 int get_fpga_state(uint dev)
50 return gd->arch.fpga_state[dev];
53 int board_early_init_f(void)
57 for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k)
58 gd->arch.fpga_state[k] = 0;
63 int board_early_init_r(void)
68 for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k)
69 gd->arch.fpga_state[k] = 0;
76 mpc8308_set_fpga_reset(1);
80 for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k) {
82 while (!mpc8308_get_fpga_done(k)) {
85 gd->arch.fpga_state[k] |=
86 FPGA_STATE_DONE_FAILED;
94 mpc8308_set_fpga_reset(0);
96 for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k) {
98 * wait for fpga out of reset
104 FPGA_SET_REG(k, reflection_low, REFLECTION_TESTPATTERN);
106 FPGA_GET_REG(k, REFLECTION_TESTREG, &val);
107 if (val == REFLECTION_TESTPATTERN_INV)
112 gd->arch.fpga_state[k] |=
113 FPGA_STATE_REFLECTION_FAILED;