1 // SPDX-License-Identifier: GPL-2.0+
4 * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
10 #include <asm/processor.h>
12 #include <asm/global_data.h>
13 #include <linux/delay.h>
16 #include <gdsys_fpga.h>
18 #define REFLECTION_TESTPATTERN 0xdede
19 #define REFLECTION_TESTPATTERN_INV (~REFLECTION_TESTPATTERN & 0xffff)
21 #ifdef CONFIG_SYS_FPGA_NO_RFL_HI
22 #define REFLECTION_TESTREG reflection_low
24 #define REFLECTION_TESTREG reflection_high
27 DECLARE_GLOBAL_DATA_PTR;
29 #ifdef CONFIG_GDSYS_LEGACY_DRIVERS
30 /* as gpio output status cannot be read back, we have to buffer it locally */
33 void setbits_gpio0_out(u32 mask)
35 immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
38 out_be32(&immr->gpio[0].dat, gpio0_out);
41 void clrbits_gpio0_out(u32 mask)
43 immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
46 out_be32(&immr->gpio[0].dat, gpio0_out);
49 int get_fpga_state(uint dev)
51 return gd->arch.fpga_state[dev];
54 int board_early_init_f(void)
58 for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k)
59 gd->arch.fpga_state[k] = 0;
64 int board_early_init_r(void)
69 for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k)
70 gd->arch.fpga_state[k] = 0;
77 mpc8308_set_fpga_reset(1);
81 for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k) {
83 while (!mpc8308_get_fpga_done(k)) {
86 gd->arch.fpga_state[k] |=
87 FPGA_STATE_DONE_FAILED;
95 mpc8308_set_fpga_reset(0);
97 for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k) {
99 * wait for fpga out of reset
105 FPGA_SET_REG(k, reflection_low, REFLECTION_TESTPATTERN);
107 FPGA_GET_REG(k, REFLECTION_TESTREG, &val);
108 if (val == REFLECTION_TESTPATTERN_INV)
113 gd->arch.fpga_state[k] |=
114 FPGA_STATE_REFLECTION_FAILED;