3 * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
5 * SPDX-License-Identifier: GPL-2.0+
10 #include <gdsys_fpga.h>
13 UNITTYPE_MAIN_SERVER = 0,
14 UNITTYPE_MAIN_USER = 1,
15 UNITTYPE_VIDEO_SERVER = 2,
16 UNITTYPE_VIDEO_USER = 3,
21 UNITTYPEPCB_DP_165 = 1,
22 UNITTYPEPCB_DP_300 = 2,
28 COMPRESSION_TYPE1_DELTA = 1,
29 COMPRESSION_TYPE1_TYPE2_DELTA = 3,
50 CARRIER_SPEED_2_5G = 1,
53 bool ioep_fpga_has_osd(unsigned int fpga)
58 FPGA_GET_REG(0, fpga_features, &fpga_features);
59 feature_osd = fpga_features & (1<<11);
64 void ioep_fpga_print_info(unsigned int fpga)
70 unsigned unit_type_pcb_video;
71 unsigned feature_compression;
73 unsigned feature_audio;
74 unsigned feature_sysclock;
75 unsigned feature_ramconfig;
76 unsigned feature_carrier_speed;
77 unsigned feature_carriers;
78 unsigned feature_video_channels;
80 FPGA_GET_REG(fpga, versions, &versions);
81 FPGA_GET_REG(fpga, fpga_version, &fpga_version);
82 FPGA_GET_REG(fpga, fpga_features, &fpga_features);
84 unit_type = (versions & 0xf000) >> 12;
85 unit_type_pcb_video = (versions & 0x01c0) >> 6;
86 feature_compression = (fpga_features & 0xe000) >> 13;
87 feature_osd = fpga_features & (1<<11);
88 feature_audio = (fpga_features & 0x0600) >> 9;
89 feature_sysclock = (fpga_features & 0x0180) >> 7;
90 feature_ramconfig = (fpga_features & 0x0060) >> 5;
91 feature_carrier_speed = fpga_features & (1<<4);
92 feature_carriers = (fpga_features & 0x000c) >> 2;
93 feature_video_channels = fpga_features & 0x0003;
96 case UNITTYPE_MAIN_SERVER:
97 case UNITTYPE_MAIN_USER:
98 printf("Mainchannel");
101 case UNITTYPE_VIDEO_SERVER:
102 case UNITTYPE_VIDEO_USER:
103 printf("Videochannel");
107 printf("UnitType %d(not supported)", unit_type);
112 case UNITTYPE_MAIN_SERVER:
113 case UNITTYPE_VIDEO_SERVER:
115 if (versions & (1<<4))
119 case UNITTYPE_MAIN_USER:
120 case UNITTYPE_VIDEO_USER:
128 if (versions & (1<<5))
133 switch (unit_type_pcb_video) {
134 case UNITTYPEPCB_DVI:
138 case UNITTYPEPCB_DP_165:
139 printf(" DP 165MPix/s,");
142 case UNITTYPEPCB_DP_300:
143 printf(" DP 300MPix/s,");
146 case UNITTYPEPCB_HDMI:
151 printf(" FPGA V %d.%02d\n features:",
152 fpga_version / 100, fpga_version % 100);
155 switch (feature_compression) {
156 case COMPRESSION_NONE:
157 printf(" no compression");
160 case COMPRESSION_TYPE1_DELTA:
161 printf(" type1-deltacompression");
164 case COMPRESSION_TYPE1_TYPE2_DELTA:
165 printf(" type1-deltacompression, type2-inlinecompression");
169 printf(" compression %d(not supported)", feature_compression);
173 printf(", %sosd", feature_osd ? "" : "no ");
175 switch (feature_audio) {
177 printf(", no audio");
181 printf(", audio tx");
185 printf(", audio rx");
189 printf(", audio rx+tx");
193 printf(", audio %d(not supported)", feature_audio);
199 switch (feature_sysclock) {
201 printf("clock 147.456 MHz");
205 printf("clock %d(not supported)", feature_sysclock);
209 switch (feature_ramconfig) {
211 printf(", RAM 32 bit DDR2");
215 printf(", RAM 32 bit DDR3");
219 printf(", RAM %d(not supported)", feature_ramconfig);
223 printf(", %d carrier(s) %s", feature_carriers,
224 feature_carrier_speed ? "2.5Gbit/s" : "1Gbit/s");
226 printf(", %d video channel(s)\n", feature_video_channels);