4 #include <asm-generic/gpio.h>
5 #include <linux/bitops.h>
6 #include <linux/delay.h>
9 #include "dt_helpers.h"
18 static struct porttype {
19 bool phy_invert_in_pol;
20 bool phy_invert_out_pol;
27 static void ihs_phy_config(struct phy_device *phydev, bool qinpn, bool qoutpn)
31 phydev->interface = PHY_INTERFACE_MODE_MII;
34 /* enable QSGMII autonegotiation with flow control */
35 phy_write(phydev, MDIO_DEVAD_NONE, 22, 0x0004);
36 reg = phy_read(phydev, MDIO_DEVAD_NONE, 16);
38 phy_write(phydev, MDIO_DEVAD_NONE, 16, reg);
41 * invert QSGMII Q_INP/N and Q_OUTP/N if required
42 * and perform global reset
44 reg = phy_read(phydev, MDIO_DEVAD_NONE, 26);
50 phy_write(phydev, MDIO_DEVAD_NONE, 26, reg);
52 /* advertise 1000BASE-T full-duplex only */
53 phy_write(phydev, MDIO_DEVAD_NONE, 22, 0x0000);
54 reg = phy_read(phydev, MDIO_DEVAD_NONE, 4);
56 phy_write(phydev, MDIO_DEVAD_NONE, 4, reg);
57 reg = phy_read(phydev, MDIO_DEVAD_NONE, 9);
58 reg = (reg & ~0x300) | 0x200;
59 phy_write(phydev, MDIO_DEVAD_NONE, 9, reg);
62 reg = phy_read(phydev, MDIO_DEVAD_NONE, 16);
64 phy_write(phydev, MDIO_DEVAD_NONE, 16, reg);
67 uint calculate_octo_phy_mask(void)
70 uint octo_phy_mask = 0;
71 struct gpio_desc gpio = {};
73 static const char * const dev_name[] = {"pca9698@23", "pca9698@21",
74 "pca9698@24", "pca9698@25",
77 /* mark all octo phys that should be present */
78 for (k = 0; k < 5; ++k) {
79 snprintf(gpio_name, 64, "cat-gpio-%u", k);
81 if (request_gpio_by_name(&gpio, dev_name[k], 0x20, gpio_name))
85 if (dm_gpio_get_value(&gpio))
86 octo_phy_mask |= (1 << (k * 2));
88 /* If CAT == 0, there's no second octo phy -> skip */
91 snprintf(gpio_name, 64, "second-octo-gpio-%u", k);
93 if (request_gpio_by_name(&gpio, dev_name[k], 0x27, gpio_name)) {
94 /* default: second octo phy is present */
95 octo_phy_mask |= (1 << (k * 2 + 1));
99 if (dm_gpio_get_value(&gpio) == 0)
100 octo_phy_mask |= (1 << (k * 2 + 1));
103 return octo_phy_mask;
106 int register_miiphy_bus(uint k, struct mii_dev **bus)
109 struct mii_dev *mdiodev = mdio_alloc();
110 char *name = bb_miiphy_buses[k].name;
114 strlcpy(mdiodev->name, name, MDIO_NAME_LEN);
115 mdiodev->read = bb_miiphy_read;
116 mdiodev->write = bb_miiphy_write;
118 retval = mdio_register(mdiodev);
121 *bus = miiphy_get_dev_by_name(name);
126 struct porttype *get_porttype(uint octo_phy_mask, uint k)
128 uint octo_index = k * 4;
131 if (octo_phy_mask & 0x01)
132 return &porttypes[PORTTYPE_MAIN_CAT];
133 else if (!(octo_phy_mask & 0x03))
134 return &porttypes[PORTTYPE_16C_16F];
136 if (octo_phy_mask & (1 << octo_index))
137 return &porttypes[PORTTYPE_TOP_CAT];
143 int init_single_phy(struct porttype *porttype, struct mii_dev *bus,
144 uint bus_idx, uint m, uint phy_idx)
146 struct phy_device *phydev;
148 phydev = phy_find_by_mask(bus, BIT(m * 8 + phy_idx));
149 printf(" %u", bus_idx * 32 + m * 8 + phy_idx);
154 ihs_phy_config(phydev, porttype->phy_invert_in_pol,
155 porttype->phy_invert_out_pol);
160 int init_octo_phys(uint octo_phy_mask)
164 /* there are up to four octo-phys on each mdio bus */
165 for (bus_idx = 0; bus_idx < bb_miiphy_buses_num; ++bus_idx) {
167 uint octo_index = bus_idx * 4;
168 struct mii_dev *bus = NULL;
169 struct porttype *porttype = NULL;
172 porttype = get_porttype(octo_phy_mask, bus_idx);
177 for (m = 0; m < 4; ++m) {
181 * Register a bus device if there is at least one phy
184 if (!m && octo_phy_mask & (0xf << octo_index)) {
185 ret = register_miiphy_bus(bus_idx, &bus);
190 if (!(octo_phy_mask & BIT(octo_index + m)))
193 for (phy_idx = 0; phy_idx < 8; ++phy_idx)
194 init_single_phy(porttype, bus, bus_idx, m,
203 * MII GPIO bitbang implementation
212 struct gpio_desc mdc_gpio;
213 struct gpio_desc mdio_gpio;
218 { 0, {}, {}, 13, 14, 1 },
219 { 1, {}, {}, 25, 45, 1 },
220 { 2, {}, {}, 46, 24, 1 },
223 static int mii_mdio_init(struct bb_miiphy_bus *bus)
225 struct gpio_mii *gpio_mii = bus->priv;
227 struct udevice *gpio_dev1 = NULL;
228 struct udevice *gpio_dev2 = NULL;
230 if (uclass_get_device_by_name(UCLASS_GPIO, "gpio@18100", &gpio_dev1) ||
231 uclass_get_device_by_name(UCLASS_GPIO, "gpio@18140", &gpio_dev2)) {
232 printf("Could not get GPIO device.\n");
236 if (gpio_mii->mdc_num > 31) {
237 gpio_mii->mdc_gpio.dev = gpio_dev2;
238 gpio_mii->mdc_gpio.offset = gpio_mii->mdc_num - 32;
240 gpio_mii->mdc_gpio.dev = gpio_dev1;
241 gpio_mii->mdc_gpio.offset = gpio_mii->mdc_num;
243 gpio_mii->mdc_gpio.flags = 0;
244 snprintf(name, 32, "bb_miiphy_bus-%d-mdc", gpio_mii->index);
245 dm_gpio_request(&gpio_mii->mdc_gpio, name);
247 if (gpio_mii->mdio_num > 31) {
248 gpio_mii->mdio_gpio.dev = gpio_dev2;
249 gpio_mii->mdio_gpio.offset = gpio_mii->mdio_num - 32;
251 gpio_mii->mdio_gpio.dev = gpio_dev1;
252 gpio_mii->mdio_gpio.offset = gpio_mii->mdio_num;
254 gpio_mii->mdio_gpio.flags = 0;
255 snprintf(name, 32, "bb_miiphy_bus-%d-mdio", gpio_mii->index);
256 dm_gpio_request(&gpio_mii->mdio_gpio, name);
258 dm_gpio_set_dir_flags(&gpio_mii->mdc_gpio, GPIOD_IS_OUT);
259 dm_gpio_set_value(&gpio_mii->mdc_gpio, 1);
264 static int mii_mdio_active(struct bb_miiphy_bus *bus)
266 struct gpio_mii *gpio_mii = bus->priv;
268 dm_gpio_set_value(&gpio_mii->mdc_gpio, gpio_mii->mdio_value);
273 static int mii_mdio_tristate(struct bb_miiphy_bus *bus)
275 struct gpio_mii *gpio_mii = bus->priv;
277 dm_gpio_set_dir_flags(&gpio_mii->mdio_gpio, GPIOD_IS_IN);
282 static int mii_set_mdio(struct bb_miiphy_bus *bus, int v)
284 struct gpio_mii *gpio_mii = bus->priv;
286 dm_gpio_set_dir_flags(&gpio_mii->mdio_gpio, GPIOD_IS_OUT);
287 dm_gpio_set_value(&gpio_mii->mdio_gpio, v);
288 gpio_mii->mdio_value = v;
293 static int mii_get_mdio(struct bb_miiphy_bus *bus, int *v)
295 struct gpio_mii *gpio_mii = bus->priv;
297 dm_gpio_set_dir_flags(&gpio_mii->mdio_gpio, GPIOD_IS_IN);
298 *v = (dm_gpio_get_value(&gpio_mii->mdio_gpio));
303 static int mii_set_mdc(struct bb_miiphy_bus *bus, int v)
305 struct gpio_mii *gpio_mii = bus->priv;
307 dm_gpio_set_value(&gpio_mii->mdc_gpio, v);
312 static int mii_delay(struct bb_miiphy_bus *bus)
319 struct bb_miiphy_bus bb_miiphy_buses[] = {
322 .init = mii_mdio_init,
323 .mdio_active = mii_mdio_active,
324 .mdio_tristate = mii_mdio_tristate,
325 .set_mdio = mii_set_mdio,
326 .get_mdio = mii_get_mdio,
327 .set_mdc = mii_set_mdc,
329 .priv = &gpio_mii_set[0],
333 .init = mii_mdio_init,
334 .mdio_active = mii_mdio_active,
335 .mdio_tristate = mii_mdio_tristate,
336 .set_mdio = mii_set_mdio,
337 .get_mdio = mii_get_mdio,
338 .set_mdc = mii_set_mdc,
340 .priv = &gpio_mii_set[1],
344 .init = mii_mdio_init,
345 .mdio_active = mii_mdio_active,
346 .mdio_tristate = mii_mdio_tristate,
347 .set_mdio = mii_set_mdio,
348 .get_mdio = mii_get_mdio,
349 .set_mdc = mii_set_mdc,
351 .priv = &gpio_mii_set[2],
355 int bb_miiphy_buses_num = ARRAY_SIZE(bb_miiphy_buses);