3 * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
5 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm/processor.h>
12 #include <asm/ppc4xx-gpio.h>
15 #include <gdsys_fpga.h>
17 #include "../common/osd.h"
19 #define LATCH0_BASE (CONFIG_SYS_LATCH_BASE)
20 #define LATCH1_BASE (CONFIG_SYS_LATCH_BASE + 0x100)
21 #define LATCH2_BASE (CONFIG_SYS_LATCH_BASE + 0x200)
24 UNITTYPE_MAIN_SERVER = 0,
25 UNITTYPE_MAIN_USER = 1,
26 UNITTYPE_VIDEO_SERVER = 2,
27 UNITTYPE_VIDEO_USER = 3,
38 COMPRESSION_TYPE1_DELTA,
56 struct ihs_fpga *fpga_ptr[] = CONFIG_SYS_FPGA_PTR;
59 * Check Board Identity:
63 char *s = getenv("serial#");
79 static void print_fpga_info(void)
85 unsigned hardware_version;
86 unsigned feature_compression;
88 unsigned feature_audio;
89 unsigned feature_sysclock;
90 unsigned feature_ramconfig;
91 unsigned feature_carriers;
92 unsigned feature_video_channels;
94 FPGA_GET_REG(0, versions, &versions);
95 FPGA_GET_REG(0, fpga_version, &fpga_version);
96 FPGA_GET_REG(0, fpga_features, &fpga_features);
98 unit_type = (versions & 0xf000) >> 12;
99 hardware_version = versions & 0x000f;
100 feature_compression = (fpga_features & 0xe000) >> 13;
101 feature_osd = fpga_features & (1<<11);
102 feature_audio = (fpga_features & 0x0600) >> 9;
103 feature_sysclock = (fpga_features & 0x0180) >> 7;
104 feature_ramconfig = (fpga_features & 0x0060) >> 5;
105 feature_carriers = (fpga_features & 0x000c) >> 2;
106 feature_video_channels = fpga_features & 0x0003;
109 case UNITTYPE_MAIN_USER:
110 printf("Mainchannel");
113 case UNITTYPE_VIDEO_USER:
114 printf("Videochannel");
118 printf("UnitType %d(not supported)", unit_type);
122 switch (hardware_version) {
124 printf(" HW-Ver 1.00\n");
128 printf(" HW-Ver 1.04\n");
132 printf(" HW-Ver 1.10\n");
136 printf(" HW-Ver %d(not supported)\n",
141 printf(" FPGA V %d.%02d, features:",
142 fpga_version / 100, fpga_version % 100);
145 switch (feature_compression) {
146 case COMPRESSION_NONE:
147 printf(" no compression");
150 case COMPRESSION_TYPE1_DELTA:
151 printf(" type1-deltacompression");
155 printf(" compression %d(not supported)", feature_compression);
159 printf(", %sosd", feature_osd ? "" : "no ");
161 switch (feature_audio) {
163 printf(", no audio");
167 printf(", audio tx");
171 printf(", audio rx");
175 printf(", audio rx+tx");
179 printf(", audio %d(not supported)", feature_audio);
185 switch (feature_sysclock) {
187 printf("clock 147.456 MHz");
191 printf("clock %d(not supported)", feature_sysclock);
195 switch (feature_ramconfig) {
197 printf(", RAM 32 bit DDR2");
201 printf(", RAM %d(not supported)", feature_ramconfig);
205 printf(", %d carrier(s)", feature_carriers);
207 printf(", %d video channel(s)\n", feature_video_channels);
210 int last_stage_init(void)
218 * provide access to fpga gpios (for I2C bitbang)
219 * (these may look all too simple but make iocon.h much more readable)
221 void fpga_gpio_set(int pin)
223 FPGA_SET_REG(0, gpio.set, pin);
226 void fpga_gpio_clear(int pin)
228 FPGA_SET_REG(0, gpio.clear, pin);
231 int fpga_gpio_get(int pin)
235 FPGA_GET_REG(0, gpio.read, &val);
240 void gd405ep_init(void)
244 void gd405ep_set_fpga_reset(unsigned state)
247 out_le16((void *)LATCH0_BASE, CONFIG_SYS_LATCH0_RESET);
248 out_le16((void *)LATCH1_BASE, CONFIG_SYS_LATCH1_RESET);
250 out_le16((void *)LATCH0_BASE, CONFIG_SYS_LATCH0_BOOT);
251 out_le16((void *)LATCH1_BASE, CONFIG_SYS_LATCH1_BOOT);
255 void gd405ep_setup_hw(void)
258 * set "startup-finished"-gpios
260 gpio_write_bit(21, 0);
261 gpio_write_bit(22, 1);
264 int gd405ep_get_fpga_done(unsigned fpga)
266 return in_le16((void *)LATCH2_BASE) & CONFIG_SYS_FPGA_DONE(fpga);