board/gdsys/405ep/io.c

   1 /*
   2  * (C) Copyright 2010
   3  * Dirk Eibach,  Guntermann & Drunck GmbH, eibach@gdsys.de
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #include <common.h>
  25 #include <command.h>
  26 #include <asm/processor.h>
  27 #include <asm/io.h>
  28 #include <asm/ppc4xx-gpio.h>
  29
  30 #include <miiphy.h>
  31
  32 #include <gdsys_fpga.h>
  33
  34 #define PHYREG_CONTROL                          0
  35 #define PHYREG_PAGE_ADDRESS                     22
  36 #define PHYREG_PG0_COPPER_SPECIFIC_CONTROL_1    16
  37 #define PHYREG_PG2_COPPER_SPECIFIC_CONTROL_2    26
  38
  39 enum {
  40         UNITTYPE_CCD_SWITCH = 1,
  41 };
  42
  43 enum {
  44         HWVER_100 = 0,
  45         HWVER_110 = 1,
  46         HWVER_121 = 2,
  47         HWVER_122 = 3,
  48 };
  49
  50 int configure_gbit_phy(unsigned char addr)
  51 {
  52         unsigned short value;
  53
  54         /* select page 2 */
  55         if (miiphy_write(CONFIG_SYS_GBIT_MII_BUSNAME, addr,
  56                 PHYREG_PAGE_ADDRESS, 0x0002))
  57                 goto err_out;
  58         /* disable SGMII autonegotiation */
  59         if (miiphy_write(CONFIG_SYS_GBIT_MII_BUSNAME, addr,
  60                 PHYREG_PG2_COPPER_SPECIFIC_CONTROL_2, 0x800a))
  61                 goto err_out;
  62         /* select page 0 */
  63         if (miiphy_write(CONFIG_SYS_GBIT_MII_BUSNAME, addr,
  64                 PHYREG_PAGE_ADDRESS, 0x0000))
  65                 goto err_out;
  66         /* switch from powerdown to normal operation */
  67         if (miiphy_read(CONFIG_SYS_GBIT_MII_BUSNAME, addr,
  68                 PHYREG_PG0_COPPER_SPECIFIC_CONTROL_1, &value))
  69                 goto err_out;
  70         if (miiphy_write(CONFIG_SYS_GBIT_MII_BUSNAME, addr,
  71                 PHYREG_PG0_COPPER_SPECIFIC_CONTROL_1, value & ~0x0004))
  72                 goto err_out;
  73         /* reset phy so settings take effect */
  74         if (miiphy_write(CONFIG_SYS_GBIT_MII_BUSNAME, addr,
  75                 PHYREG_CONTROL, 0x9140))
  76                 goto err_out;
  77
  78         return 0;
  79
  80 err_out:
  81         printf("Error writing to the PHY addr=%02x\n", addr);
  82         return -1;
  83 }
  84
  85 /*
  86  * Check Board Identity:
  87  */
  88 int checkboard(void)
  89 {
  90         char buf[64];
  91         int i = getenv_f("serial#", buf, sizeof(buf));
  92         ihs_fpga_t *fpga = (ihs_fpga_t *) CONFIG_SYS_FPGA_BASE(0);
  93         u16 versions = in_le16(&fpga->versions);
  94         u16 fpga_version = in_le16(&fpga->fpga_version);
  95         u16 fpga_features = in_le16(&fpga->fpga_features);
  96         unsigned unit_type;
  97         unsigned hardware_version;
  98         unsigned feature_channels;
  99         unsigned feature_expansion;
 100
 101         unit_type = (versions & 0xf000) >> 12;
 102         hardware_version = versions & 0x000f;
 103         feature_channels = fpga_features & 0x007f;
 104         feature_expansion = fpga_features & (1<<15);
 105
 106         printf("Board: ");
 107
 108         printf("CATCenter Io");
 109
 110         if (i > 0) {
 111                 puts(", serial# ");
 112                 puts(buf);
 113         }
 114         puts("\n       ");
 115
 116         switch (unit_type) {
 117         case UNITTYPE_CCD_SWITCH:
 118                 printf("CCD-Switch");
 119                 break;
 120
 121         default:
 122                 printf("UnitType %d(not supported)", unit_type);
 123                 break;
 124         }
 125
 126         switch (hardware_version) {
 127         case HWVER_100:
 128                 printf(" HW-Ver 1.00\n");
 129                 break;
 130
 131         case HWVER_110:
 132                 printf(" HW-Ver 1.10\n");
 133                 break;
 134
 135         case HWVER_121:
 136                 printf(" HW-Ver 1.21\n");
 137                 break;
 138
 139         case HWVER_122:
 140                 printf(" HW-Ver 1.22\n");
 141                 break;
 142
 143         default:
 144                 printf(" HW-Ver %d(not supported)\n",
 145                        hardware_version);
 146                 break;
 147         }
 148
 149         printf("       FPGA V %d.%02d, features:",
 150                 fpga_version / 100, fpga_version % 100);
 151
 152         printf(" %d channel(s)", feature_channels);
 153
 154         printf(", expansion %ssupported\n", feature_expansion ? "" : "un");
 155
 156         return 0;
 157 }
 158
 159 /*
 160  * setup Gbit PHYs
 161  */
 162 int last_stage_init(void)
 163 {
 164         ihs_fpga_t *fpga = (ihs_fpga_t *) CONFIG_SYS_FPGA_BASE(0);
 165         unsigned int k;
 166
 167         miiphy_register(CONFIG_SYS_GBIT_MII_BUSNAME,
 168                 bb_miiphy_read, bb_miiphy_write);
 169
 170         for (k = 0; k < 32; ++k)
 171                 configure_gbit_phy(k);
 172
 173         /* take fpga serdes blocks out of reset */
 174         out_le16(&fpga->quad_serdes_reset, 0);
 175
 176         return 0;
 177 }