1 // SPDX-License-Identifier: GPL-2.0+
2 /* Copyright 2013 Freescale Semiconductor, Inc.
6 #include <clock_legacy.h>
8 #include <env_internal.h>
15 #include <fsl_esdhc.h>
16 #include <spi_flash.h>
17 #include <asm/global_data.h>
18 #include "../common/sleep.h"
19 #include "../common/spl.h"
21 DECLARE_GLOBAL_DATA_PTR;
23 phys_size_t get_effective_memsize(void)
25 return CONFIG_SYS_L3_SIZE;
28 #define FSL_CORENET_CCSR_PORSR1_RCW_MASK 0xFF800000
29 void board_init_f(ulong bootflag)
31 u32 plat_ratio, sys_clk, uart_clk;
32 #if defined(CONFIG_SPL_NAND_BOOT) && defined(CONFIG_A008044_WORKAROUND)
36 ccsr_gur_t *gur = (void *)CFG_SYS_MPC85xx_GUTS_ADDR;
38 #if defined(CONFIG_SPL_NAND_BOOT) && defined(CONFIG_A008044_WORKAROUND)
39 if (IS_SVR_REV(svr, 1, 0)) {
41 * There is T1040 SoC issue where NOR, FPGA are inaccessible
42 * during NAND boot because IFC signals > IFC_AD7 are not
43 * enabled. This workaround changes RCW source to make all
46 porsr1 = in_be32(&gur->porsr1);
47 pinctl = ((porsr1 & ~(FSL_CORENET_CCSR_PORSR1_RCW_MASK))
49 out_be32((unsigned int *)(CFG_SYS_DCSRBAR + 0x20000),
54 /* Memcpy existing GD at CONFIG_SPL_GD_ADDR */
55 memcpy((void *)CONFIG_SPL_GD_ADDR, (void *)gd, sizeof(gd_t));
57 /* Update GD pointer */
58 gd = (gd_t *)(CONFIG_SPL_GD_ADDR);
60 #ifdef CONFIG_DEEP_SLEEP
61 /* disable the console if boot from deep sleep */
63 fsl_dp_disable_console();
65 /* compiler optimization barrier needed for GCC >= 3.4 */
66 __asm__ __volatile__("" : : : "memory");
70 /* initialize selected port with appropriate baud rate */
71 sys_clk = get_board_sys_clk();
72 plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f;
73 uart_clk = sys_clk * plat_ratio / 2;
75 ns16550_init((struct ns16550 *)CFG_SYS_NS16550_COM1,
76 uart_clk / 16 / CONFIG_BAUDRATE);
78 relocate_code(CONFIG_SPL_RELOC_STACK, (gd_t *)CONFIG_SPL_GD_ADDR, 0x0);
81 void board_init_r(gd_t *gd, ulong dest_addr)
85 bd = (struct bd_info *)(gd + sizeof(gd_t));
86 memset(bd, 0, sizeof(struct bd_info));
91 mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
92 CONFIG_SPL_RELOC_MALLOC_SIZE);
93 gd->flags |= GD_FLG_FULL_MALLOC_INIT;
95 #ifdef CONFIG_SPL_MMC_BOOT
99 /* relocate environment function pointers etc. */
100 #if defined(CONFIG_ENV_IS_IN_NAND) || defined(CONFIG_ENV_IS_IN_MMC) || \
101 defined(CONFIG_ENV_IS_IN_SPI_FLASH)
102 #ifdef CONFIG_SPL_NAND_BOOT
103 nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
104 (uchar *)SPL_ENV_ADDR);
106 #ifdef CONFIG_SPL_MMC_BOOT
107 mmc_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
108 (uchar *)SPL_ENV_ADDR);
110 #ifdef CONFIG_SPL_SPI_BOOT
111 fsl_spi_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
112 (uchar *)SPL_ENV_ADDR);
114 gd->env_addr = (ulong)(SPL_ENV_ADDR);
115 gd->env_valid = ENV_VALID;
124 #ifdef CONFIG_SPL_MMC_BOOT
126 #elif defined(CONFIG_SPL_SPI_BOOT)
128 #elif defined(CONFIG_SPL_NAND_BOOT)