1 // SPDX-License-Identifier: GPL-2.0+
2 /* Copyright 2014 Freescale Semiconductor, Inc.
6 #include <clock_legacy.h>
8 #include <env_internal.h>
15 #include <fsl_esdhc.h>
16 #include <spi_flash.h>
17 #include "../common/sleep.h"
18 #include "../common/spl.h"
20 DECLARE_GLOBAL_DATA_PTR;
22 phys_size_t get_effective_memsize(void)
24 return CONFIG_SYS_L3_SIZE;
27 unsigned long get_board_sys_clk(void)
29 return CONFIG_SYS_CLK_FREQ;
32 unsigned long get_board_ddr_clk(void)
34 return CONFIG_DDR_CLK_FREQ;
37 #if defined(CONFIG_SPL_MMC_BOOT)
38 #define GPIO1_SD_SEL 0x00020000
39 int board_mmc_getcd(struct mmc *mmc)
41 ccsr_gpio_t __iomem *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
42 u32 val = in_be32(&pgpio->gpdat);
44 /* GPIO1_14, 0: eMMC, 1: SD */
50 int board_mmc_getwp(struct mmc *mmc)
52 ccsr_gpio_t __iomem *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
53 u32 val = in_be32(&pgpio->gpdat);
61 void board_init_f(ulong bootflag)
63 u32 plat_ratio, sys_clk, ccb_clk;
64 ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
66 /* Memcpy existing GD at CONFIG_SPL_GD_ADDR */
67 memcpy((void *)CONFIG_SPL_GD_ADDR, (void *)gd, sizeof(gd_t));
69 /* Update GD pointer */
70 gd = (gd_t *)(CONFIG_SPL_GD_ADDR);
74 #ifdef CONFIG_DEEP_SLEEP
75 /* disable the console if boot from deep sleep */
77 fsl_dp_disable_console();
80 /* initialize selected port with appropriate baud rate */
81 sys_clk = get_board_sys_clk();
82 plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f;
83 ccb_clk = sys_clk * plat_ratio / 2;
85 NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
86 ccb_clk / 16 / CONFIG_BAUDRATE);
88 #if defined(CONFIG_SPL_MMC_BOOT)
89 puts("\nSD boot...\n");
90 #elif defined(CONFIG_SPL_SPI_BOOT)
91 puts("\nSPI boot...\n");
92 #elif defined(CONFIG_SPL_NAND_BOOT)
93 puts("\nNAND boot...\n");
96 relocate_code(CONFIG_SPL_RELOC_STACK, (gd_t *)CONFIG_SPL_GD_ADDR, 0x0);
99 void board_init_r(gd_t *gd, ulong dest_addr)
103 bd = (struct bd_info *)(gd + sizeof(gd_t));
104 memset(bd, 0, sizeof(struct bd_info));
106 bd->bi_memstart = CONFIG_SYS_INIT_L3_ADDR;
107 bd->bi_memsize = CONFIG_SYS_L3_SIZE;
111 mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
112 CONFIG_SPL_RELOC_MALLOC_SIZE);
113 gd->flags |= GD_FLG_FULL_MALLOC_INIT;
115 #ifdef CONFIG_SPL_NAND_BOOT
116 nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
117 (uchar *)SPL_ENV_ADDR);
119 #ifdef CONFIG_SPL_MMC_BOOT
121 mmc_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
122 (uchar *)SPL_ENV_ADDR);
124 #ifdef CONFIG_SPL_SPI_BOOT
125 fsl_spi_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
126 (uchar *)SPL_ENV_ADDR);
129 gd->env_addr = (ulong)(SPL_ENV_ADDR);
130 gd->env_valid = ENV_VALID;
136 #ifdef CONFIG_SPL_MMC_BOOT
138 #elif defined(CONFIG_SPL_SPI_BOOT)
140 #elif defined(CONFIG_SPL_NAND_BOOT)