1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2011 Freescale Semiconductor, Inc.
4 * Jason Liu <r64343@freescale.com>
10 #include <asm/global_data.h>
12 #include <asm/arch/imx-regs.h>
13 #include <asm/arch/sys_proto.h>
14 #include <asm/arch/crm_regs.h>
15 #include <asm/arch/clock.h>
16 #include <asm/arch/iomux-mx53.h>
17 #include <asm/arch/clock.h>
19 #include <linux/errno.h>
20 #include <asm/mach-imx/mx5_video.h>
23 #include <fsl_esdhc_imx.h>
25 #include <power/pmic.h>
26 #include <dialog_pmic.h>
29 #include <ipu_pixfmt.h>
31 #define MX53LOCO_LCD_POWER IMX_GPIO_NR(3, 24)
33 DECLARE_GLOBAL_DATA_PTR;
35 #ifdef CONFIG_REVISION_TAG
36 u32 get_board_rev(void)
38 struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
39 struct fuse_bank *bank = &iim->bank[0];
40 struct fuse_bank0_regs *fuse =
41 (struct fuse_bank0_regs *)bank->fuse_regs;
43 int rev = readl(&fuse->gp[6]);
45 if (!i2c_probe(CONFIG_SYS_DIALOG_PMIC_I2C_ADDR))
48 return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8;
52 #define UART_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \
53 PAD_CTL_PUS_100K_UP | PAD_CTL_ODE)
55 static void setup_iomux_uart(void)
57 static const iomux_v3_cfg_t uart_pads[] = {
58 NEW_PAD_CTRL(MX53_PAD_CSI0_DAT11__UART1_RXD_MUX, UART_PAD_CTRL),
59 NEW_PAD_CTRL(MX53_PAD_CSI0_DAT10__UART1_TXD_MUX, UART_PAD_CTRL),
62 imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
65 #define I2C_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | \
66 PAD_CTL_PUS_100K_UP | PAD_CTL_ODE)
68 static void setup_iomux_i2c(void)
70 static const iomux_v3_cfg_t i2c1_pads[] = {
71 NEW_PAD_CTRL(MX53_PAD_CSI0_DAT8__I2C1_SDA, I2C_PAD_CTRL),
72 NEW_PAD_CTRL(MX53_PAD_CSI0_DAT9__I2C1_SCL, I2C_PAD_CTRL),
75 imx_iomux_v3_setup_multiple_pads(i2c1_pads, ARRAY_SIZE(i2c1_pads));
78 static int power_init(void)
84 if (!i2c_probe(CONFIG_SYS_DIALOG_PMIC_I2C_ADDR)) {
85 ret = pmic_dialog_init(I2C_PMIC);
89 p = pmic_get("DIALOG_PMIC");
93 env_set("fdt_file", "imx53-qsb.dtb");
95 /* Set VDDA to 1.25V */
96 val = DA9052_BUCKCORE_BCOREEN | DA_BUCKCORE_VBCORE_1_250V;
97 ret = pmic_reg_write(p, DA9053_BUCKCORE_REG, val);
99 printf("Writing to BUCKCORE_REG failed: %d\n", ret);
103 pmic_reg_read(p, DA9053_SUPPLY_REG, &val);
104 val |= DA9052_SUPPLY_VBCOREGO;
105 ret = pmic_reg_write(p, DA9053_SUPPLY_REG, val);
107 printf("Writing to SUPPLY_REG failed: %d\n", ret);
111 /* Set Vcc peripheral to 1.30V */
112 ret = pmic_reg_write(p, DA9053_BUCKPRO_REG, 0x62);
114 printf("Writing to BUCKPRO_REG failed: %d\n", ret);
118 ret = pmic_reg_write(p, DA9053_SUPPLY_REG, 0x62);
120 printf("Writing to SUPPLY_REG failed: %d\n", ret);
127 if (!i2c_probe(CONFIG_SYS_FSL_PMIC_I2C_ADDR)) {
128 ret = pmic_init(I2C_0);
132 p = pmic_get("FSL_PMIC");
136 env_set("fdt_file", "imx53-qsrb.dtb");
138 /* Set VDDGP to 1.25V for 1GHz on SW1 */
139 pmic_reg_read(p, REG_SW_0, &val);
140 val = (val & ~SWx_VOLT_MASK_MC34708) | SWx_1_250V_MC34708;
141 ret = pmic_reg_write(p, REG_SW_0, val);
143 printf("Writing to REG_SW_0 failed: %d\n", ret);
147 /* Set VCC as 1.30V on SW2 */
148 pmic_reg_read(p, REG_SW_1, &val);
149 val = (val & ~SWx_VOLT_MASK_MC34708) | SWx_1_300V_MC34708;
150 ret = pmic_reg_write(p, REG_SW_1, val);
152 printf("Writing to REG_SW_1 failed: %d\n", ret);
156 /* Set global reset timer to 4s */
157 pmic_reg_read(p, REG_POWER_CTL2, &val);
158 val = (val & ~TIMER_MASK_MC34708) | TIMER_4S_MC34708;
159 ret = pmic_reg_write(p, REG_POWER_CTL2, val);
161 printf("Writing to REG_POWER_CTL2 failed: %d\n", ret);
165 /* Set VUSBSEL and VUSBEN for USB PHY supply*/
166 pmic_reg_read(p, REG_MODE_0, &val);
167 val |= (VUSBSEL_MC34708 | VUSBEN_MC34708);
168 ret = pmic_reg_write(p, REG_MODE_0, val);
170 printf("Writing to REG_MODE_0 failed: %d\n", ret);
174 /* Set SWBST to 5V in auto mode */
176 ret = pmic_reg_write(p, SWBST_CTRL, val);
178 printf("Writing to SWBST_CTRL failed: %d\n", ret);
188 static void clock_1GHz(void)
191 u32 ref_clk = MXC_HCLK;
193 * After increasing voltage to 1.25V, we can switch
194 * CPU clock to 1GHz and DDR to 400MHz safely
196 ret = mxc_set_clock(ref_clk, 1000, MXC_ARM_CLK);
198 printf("CPU: Switch CPU clock to 1GHZ failed\n");
200 ret = mxc_set_clock(ref_clk, 400, MXC_PERIPH_CLK);
201 ret |= mxc_set_clock(ref_clk, 400, MXC_DDR_CLK);
203 printf("CPU: Switch DDR clock to 400MHz failed\n");
206 int board_early_init_f(void)
215 * Do not overwrite the console
216 * Use always serial for U-Boot console
218 int overwrite_console(void)
225 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
227 mxc_set_sata_internal_clock();
233 int board_late_init(void)
243 puts("Board: MX53 LOCO\n");