board/freescale/imx93_evk/spl.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright 2022 NXP
   4  */
   5
   6 #include <common.h>
   7 #include <command.h>
   8 #include <cpu_func.h>
   9 #include <hang.h>
  10 #include <image.h>
  11 #include <init.h>
  12 #include <log.h>
  13 #include <spl.h>
  14 #include <asm/global_data.h>
  15 #include <asm/io.h>
  16 #include <asm/arch/imx93_pins.h>
  17 #include <asm/arch/clock.h>
  18 #include <asm/arch/sys_proto.h>
  19 #include <asm/mach-imx/boot_mode.h>
  20 #include <asm/mach-imx/mxc_i2c.h>
  21 #include <asm/arch-mx7ulp/gpio.h>
  22 #include <asm/mach-imx/syscounter.h>
  23 #include <asm/mach-imx/s400_api.h>
  24 #include <dm/uclass.h>
  25 #include <dm/device.h>
  26 #include <dm/uclass-internal.h>
  27 #include <dm/device-internal.h>
  28 #include <linux/delay.h>
  29 #include <asm/arch/clock.h>
  30 #include <asm/arch/ccm_regs.h>
  31 #include <asm/arch/ddr.h>
  32 #include <power/pmic.h>
  33 #include <power/pca9450.h>
  34 #include <asm/arch/trdc.h>
  35
  36 DECLARE_GLOBAL_DATA_PTR;
  37
  38 int spl_board_boot_device(enum boot_device boot_dev_spl)
  39 {
  40         return BOOT_DEVICE_BOOTROM;
  41 }
  42
  43 void spl_board_init(void)
  44 {
  45         puts("Normal Boot\n");
  46 }
  47
  48 void spl_dram_init(void)
  49 {
  50         ddr_init(&dram_timing);
  51 }
  52
  53 #if CONFIG_IS_ENABLED(DM_PMIC_PCA9450)
  54 int power_init_board(void)
  55 {
  56         struct udevice *dev;
  57         int ret;
  58
  59         ret = pmic_get("pmic@25", &dev);
  60         if (ret == -ENODEV) {
  61                 puts("No pca9450@25\n");
  62                 return 0;
  63         }
  64         if (ret != 0)
  65                 return ret;
  66
  67         /* BUCKxOUT_DVS0/1 control BUCK123 output */
  68         pmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29);
  69
  70         /* 0.9v
  71          */
  72         pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x18);
  73         pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x18);
  74
  75         /* I2C_LT_EN*/
  76         pmic_reg_write(dev, 0xa, 0x3);
  77
  78         /* set WDOG_B_CFG to cold reset */
  79         pmic_reg_write(dev, PCA9450_RESET_CTRL, 0xA1);
  80         return 0;
  81 }
  82 #endif
  83
  84 extern int imx9_probe_mu(void *ctx, struct event *event);
  85 void board_init_f(ulong dummy)
  86 {
  87         int ret;
  88
  89         /* Clear the BSS. */
  90         memset(__bss_start, 0, __bss_end - __bss_start);
  91
  92         timer_init();
  93
  94         arch_cpu_init();
  95
  96         board_early_init_f();
  97
  98         spl_early_init();
  99
 100         preloader_console_init();
 101
 102         ret = imx9_probe_mu(NULL, NULL);
 103         if (ret) {
 104                 printf("Fail to init Sentinel API\n");
 105         } else {
 106                 printf("SOC: 0x%x\n", gd->arch.soc_rev);
 107                 printf("LC: 0x%x\n", gd->arch.lifecycle);
 108         }
 109         power_init_board();
 110
 111         /* 1.7GHz */
 112         set_arm_clk(1700000000);
 113
 114         /* Init power of mix */
 115         soc_power_init();
 116
 117         /* Setup TRDC for DDR access */
 118         trdc_init();
 119
 120         /* DDR initialization */
 121         spl_dram_init();
 122
 123         /* Put M33 into CPUWAIT for following kick */
 124         ret = m33_prepare();
 125         if (!ret)
 126                 printf("M33 prepare ok\n");
 127
 128         board_init_r(NULL, 0);
 129 }