board/freescale/imx8ulp_evk/spl.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright 2021 NXP
   4  */
   5
   6 #include <common.h>
   7 #include <init.h>
   8 #include <spl.h>
   9 #include <asm/io.h>
  10 #include <errno.h>
  11 #include <asm/arch/sys_proto.h>
  12 #include <asm/arch/clock.h>
  13 #include <asm/arch/imx8ulp-pins.h>
  14 #include <dm/uclass.h>
  15 #include <dm/device.h>
  16 #include <dm/uclass-internal.h>
  17 #include <dm/device-internal.h>
  18 #include <dm/lists.h>
  19 #include <asm/arch/ddr.h>
  20 #include <asm/arch/rdc.h>
  21 #include <asm/arch/upower.h>
  22
  23 DECLARE_GLOBAL_DATA_PTR;
  24
  25 void spl_dram_init(void)
  26 {
  27         init_clk_ddr();
  28         ddr_init(&dram_timing);
  29 }
  30
  31 u32 spl_boot_device(void)
  32 {
  33         return BOOT_DEVICE_BOOTROM;
  34 }
  35
  36 int power_init_board(void)
  37 {
  38         u32 pmic_reg;
  39
  40         /* PMIC set bucks1-4 to PWM mode */
  41         upower_pmic_i2c_read(0x10, &pmic_reg);
  42         upower_pmic_i2c_read(0x14, &pmic_reg);
  43         upower_pmic_i2c_read(0x21, &pmic_reg);
  44         upower_pmic_i2c_read(0x2e, &pmic_reg);
  45
  46         upower_pmic_i2c_write(0x10, 0x3d);
  47         upower_pmic_i2c_write(0x14, 0x7d);
  48         upower_pmic_i2c_write(0x21, 0x7d);
  49         upower_pmic_i2c_write(0x2e, 0x3d);
  50
  51         upower_pmic_i2c_read(0x10, &pmic_reg);
  52         upower_pmic_i2c_read(0x14, &pmic_reg);
  53         upower_pmic_i2c_read(0x21, &pmic_reg);
  54         upower_pmic_i2c_read(0x2e, &pmic_reg);
  55
  56         /* Set buck3 to 1.1v OD */
  57         upower_pmic_i2c_write(0x22, 0x28);
  58         return 0;
  59 }
  60
  61 void spl_board_init(void)
  62 {
  63         struct udevice *dev;
  64
  65         uclass_find_first_device(UCLASS_MISC, &dev);
  66
  67         for (; dev; uclass_find_next_device(&dev)) {
  68                 if (device_probe(dev))
  69                         continue;
  70         }
  71
  72         board_early_init_f();
  73
  74         preloader_console_init();
  75
  76         puts("Normal Boot\n");
  77
  78         /* After AP set iomuxc0, the i2c can't work, Need M33 to set it now */
  79
  80         upower_init();
  81
  82         power_init_board();
  83
  84         /* DDR initialization */
  85         spl_dram_init();
  86
  87         /* This must place after upower init, so access to MDA and MRC are valid */
  88         /* Init XRDC MDA  */
  89         xrdc_init_mda();
  90
  91         /* Init XRDC MRC for VIDEO, DSP domains */
  92         xrdc_init_mrc();
  93 }
  94
  95 void board_init_f(ulong dummy)
  96 {
  97         /* Clear the BSS. */
  98         memset(__bss_start, 0, __bss_end - __bss_start);
  99
 100         timer_init();
 101
 102         arch_cpu_init();
 103
 104         board_init_r(NULL, 0);
 105 }