board/freescale/imx8qm_mek/imx8qm_mek.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright 2018 NXP
   4  */
   5
   6 #include <common.h>
   7 #include <cpu_func.h>
   8 #include <env.h>
   9 #include <errno.h>
  10 #include <init.h>
  11 #include <asm/global_data.h>
  12 #include <linux/libfdt.h>
  13 #include <fdt_support.h>
  14 #include <asm/io.h>
  15 #include <asm/gpio.h>
  16 #include <asm/arch/clock.h>
  17 #include <asm/arch/sci/sci.h>
  18 #include <asm/arch/imx8-pins.h>
  19 #include <asm/arch/iomux.h>
  20 #include <asm/arch/sys_proto.h>
  21
  22 DECLARE_GLOBAL_DATA_PTR;
  23
  24 #define UART_PAD_CTRL   ((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | \
  25                          (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \
  26                          (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \
  27                          (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
  28
  29 static iomux_cfg_t uart0_pads[] = {
  30         SC_P_UART0_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
  31         SC_P_UART0_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
  32 };
  33
  34 static void setup_iomux_uart(void)
  35 {
  36         imx8_iomux_setup_multiple_pads(uart0_pads, ARRAY_SIZE(uart0_pads));
  37 }
  38
  39 int board_early_init_f(void)
  40 {
  41         sc_pm_clock_rate_t rate = SC_80MHZ;
  42         int ret;
  43
  44         /* Set UART0 clock root to 80 MHz */
  45         ret = sc_pm_setup_uart(SC_R_UART_0, rate);
  46         if (ret)
  47                 return ret;
  48
  49         setup_iomux_uart();
  50
  51         sc_pm_set_resource_power_mode(-1, SC_R_GPIO_5, SC_PM_PW_MODE_ON);
  52
  53         return 0;
  54 }
  55
  56 #if CONFIG_IS_ENABLED(DM_GPIO)
  57 static void board_gpio_init(void)
  58 {
  59         /* TODO */
  60 }
  61 #else
  62 static inline void board_gpio_init(void) {}
  63 #endif
  64
  65 #if IS_ENABLED(CONFIG_FEC_MXC)
  66 #include <miiphy.h>
  67
  68 int board_phy_config(struct phy_device *phydev)
  69 {
  70         phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f);
  71         phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8);
  72
  73         phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00);
  74         phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee);
  75         phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
  76         phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100);
  77
  78         if (phydev->drv->config)
  79                 phydev->drv->config(phydev);
  80
  81         return 0;
  82 }
  83 #endif
  84
  85 int checkboard(void)
  86 {
  87         puts("Board: iMX8QM MEK\n");
  88
  89         build_info();
  90         print_bootinfo();
  91
  92         return 0;
  93 }
  94
  95 int board_init(void)
  96 {
  97         /* Power up base board */
  98         sc_pm_set_resource_power_mode(-1, SC_R_BOARD_R1, SC_PM_PW_MODE_ON);
  99
 100         board_gpio_init();
 101
 102         return 0;
 103 }
 104
 105 /*
 106  * Board specific reset that is system reset.
 107  */
 108 void reset_cpu(ulong addr)
 109 {
 110         /* TODO */
 111 }
 112
 113 #ifdef CONFIG_OF_BOARD_SETUP
 114 int ft_board_setup(void *blob, struct bd_info *bd)
 115 {
 116         return 0;
 117 }
 118 #endif
 119
 120 int board_mmc_get_env_dev(int devno)
 121 {
 122         return devno;
 123 }
 124
 125 int board_late_init(void)
 126 {
 127         char *fdt_file;
 128         bool m4_booted;
 129
 130 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
 131         env_set("board_name", "MEK");
 132         env_set("board_rev", "iMX8QM");
 133 #endif
 134
 135         fdt_file = env_get("fdt_file");
 136         m4_booted = m4_parts_booted();
 137
 138         if (fdt_file && !strcmp(fdt_file, "undefined")) {
 139                 if (m4_booted)
 140                         env_set("fdt_file", "imx8qm-mek-rpmsg.dtb");
 141                 else
 142                         env_set("fdt_file", "imx8qm-mek.dtb");
 143         }
 144
 145         return 0;
 146 }