board/freescale/imx8mn_evk/spl.c

   1 /*
   2  * Copyright 2018-2019 NXP
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <common.h>
   8 #include <cpu_func.h>
   9 #include <hang.h>
  10 #include <image.h>
  11 #include <init.h>
  12 #include <spl.h>
  13 #include <asm/io.h>
  14 #include <asm/mach-imx/iomux-v3.h>
  15 #include <asm/arch/clock.h>
  16 #include <asm/arch/imx8mn_pins.h>
  17 #include <asm/arch/sys_proto.h>
  18 #include <asm/mach-imx/boot_mode.h>
  19 #include <asm/arch/ddr.h>
  20
  21 #include <dm/uclass.h>
  22 #include <dm/device.h>
  23 #include <dm/uclass-internal.h>
  24 #include <dm/device-internal.h>
  25
  26 DECLARE_GLOBAL_DATA_PTR;
  27
  28 int spl_board_boot_device(enum boot_device boot_dev_spl)
  29 {
  30         return BOOT_DEVICE_BOOTROM;
  31 }
  32
  33 void spl_dram_init(void)
  34 {
  35         ddr_init(&dram_timing);
  36 }
  37
  38 void spl_board_init(void)
  39 {
  40         struct udevice *dev;
  41         int ret;
  42
  43         puts("Normal Boot\n");
  44
  45         ret = uclass_get_device_by_name(UCLASS_CLK,
  46                                         "clock-controller@30380000",
  47                                         &dev);
  48         if (ret < 0)
  49                 printf("Failed to find clock node. Check device tree\n");
  50 }
  51
  52 #ifdef CONFIG_SPL_LOAD_FIT
  53 int board_fit_config_name_match(const char *name)
  54 {
  55         /* Just empty function now - can't decide what to choose */
  56         debug("%s: %s\n", __func__, name);
  57
  58         return 0;
  59 }
  60 #endif
  61
  62 #define UART_PAD_CTRL   (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
  63 #define WDOG_PAD_CTRL   (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
  64
  65 static iomux_v3_cfg_t const uart_pads[] = {
  66         IMX8MN_PAD_UART2_RXD__UART2_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
  67         IMX8MN_PAD_UART2_TXD__UART2_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
  68 };
  69
  70 static iomux_v3_cfg_t const wdog_pads[] = {
  71         IMX8MN_PAD_GPIO1_IO02__WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
  72 };
  73
  74 int board_early_init_f(void)
  75 {
  76         struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
  77
  78         imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
  79
  80         set_wdog_reset(wdog);
  81
  82         imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
  83
  84         init_uart_clk(1);
  85
  86         return 0;
  87 }
  88
  89 void board_init_f(ulong dummy)
  90 {
  91         int ret;
  92
  93         arch_cpu_init();
  94
  95         init_uart_clk(1);
  96
  97         board_early_init_f();
  98
  99         timer_init();
 100
 101         preloader_console_init();
 102
 103         /* Clear the BSS. */
 104         memset(__bss_start, 0, __bss_end - __bss_start);
 105
 106         ret = spl_init();
 107         if (ret) {
 108                 debug("spl_init() failed: %d\n", ret);
 109                 hang();
 110         }
 111
 112         enable_tzc380();
 113
 114         /* DDR initialization */
 115         spl_dram_init();
 116
 117         board_init_r(NULL, 0);
 118 }