1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2014 Freescale Semiconductor, Inc.
9 #define IR36021_LOOP1_MANUAL_ID_OFFSET 0x6A
10 #define IR36021_LOOP1_VOUT_OFFSET 0x9A
11 #define IR36021_MFR_ID_OFFSET 0x92
12 #define IR36021_MFR_ID 0x43
13 #define IR36021_INTEL_MODE_OOFSET 0x14
14 #define IR36021_MODE_MASK 0x20
15 #define IR36021_INTEL_MODE 0x00
16 #define IR36021_AMD_MODE 0x20
18 /* step the IR regulator in 5mV increments */
19 #define IR_VDD_STEP_DOWN 5
20 #define IR_VDD_STEP_UP 5
23 #define PMBUS_CMD_WRITE_PROTECT 0x10
25 * WRITE_PROTECT command supported values
26 * 0x80: Disable all writes except WRITE_PROTECT, PAGE,
27 * STORE_USER_ALL and MFR_EE_UNLOCK commands.
28 * 0x40: Disable all writes except WRITE_PROTECT, PAGE, STORE_USER_ALL,
29 * MFR_EE_UNLOCK, OPERATION, CLEAR_PEAKS and CLEAR_FAULTS commands.
30 * Individual faults can also be cleared by writing a 1 to the
31 * respective status bit.
32 * 0x20: Disable all writes except WRITE_PROTECT, PAGE, STORE_USER_ ALL,
33 * MFR_EE_UNLOCK, OPERATION, CLEAR_PEAKS, CLEAR_FAULTS, ON_OFF_CONFIG
34 * and VOUT_COMMAND commands. Individual faults can be cleared by
35 * writing a 1 to the respective status bit.
36 * 0x00: Enables write to all commands
38 #define EN_WRITE_ALL_CMD (0)
40 int adjust_vdd(ulong vdd_override);