1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2011 Freescale Semiconductor
5 * Author: Shengzhou Liu <Shengzhou.Liu@freescale.com>
7 * This file provides support for the QIXIS of some Freescale reference boards.
14 u8 id; /* ID value uniquely identifying each QDS board type */
15 u8 arch; /* Board version information */
16 u8 scver; /* QIXIS Version Register */
17 u8 model; /* Information of software programming model version */
20 u8 aux; /* Auxiliary Register,0x06 */
26 u8 present2; /* Presence Status Register 2,0x0c */
30 u8 rcfg_ctl; /* Reconfig Control Register,0x10 */
37 u8 gdd; /* DCM Debug Data Register,0x17 */
45 u8 watch; /* Watchdog Register,0x1F */
46 u8 pwr_ctl[2]; /* Power Control Register,0x20 */
48 u8 pwr_stat[4]; /* Power Status Register,0x24 */
50 u8 clk_spd2[2]; /* SYSCLK clock Speed Register,0x30 */
52 u8 sclk[3]; /* Clock Configuration Registers,0x34 */
58 u8 rst_ctl; /* Reset Control Register,0x40 */
59 u8 rst_stat; /* Reset Status Register */
60 u8 rst_rsn; /* Reset Reason Register */
61 u8 rst_frc[2]; /* Reset Force Registers,0x43 */
63 u8 brdcfg[16]; /* Board Configuration Register,0x50 */
65 u8 rcw_ad[2]; /* RCW SRAM Address Registers,0x70 */
84 u8 clk_freq[6]; /* Clock Measurement Registers */
86 u8 clk_base[2]; /* Clock Frequency Base Reg */
88 u8 cms[2]; /* Core Management Space Address Register, 0xD8 */
90 u8 aux2[4]; /* Auxiliary Registers,0xE0 */
97 u8 qixis_read(unsigned int reg);
98 void qixis_write(unsigned int reg, u8 value);
99 u16 qixis_read_minor(void);
100 char *qixis_read_time(char *result);
101 char *qixis_read_tag(char *buf);
102 const char *byte_to_binary_mask(u8 val, u8 mask, char *buf);
103 #ifdef CONFIG_SYS_I2C_FPGA_ADDR
104 u8 qixis_read_i2c(unsigned int reg);
105 void qixis_write_i2c(unsigned int reg, u8 value);
108 #if defined(CONFIG_QIXIS_I2C_ACCESS) && defined(CONFIG_SYS_I2C_FPGA_ADDR)
109 #define QIXIS_READ(reg) qixis_read_i2c(offsetof(struct qixis, reg))
110 #define QIXIS_WRITE(reg, value) \
111 qixis_write_i2c(offsetof(struct qixis, reg), value)
113 #define QIXIS_READ(reg) qixis_read(offsetof(struct qixis, reg))
114 #define QIXIS_WRITE(reg, value) qixis_write(offsetof(struct qixis, reg), value)
117 #ifdef CONFIG_SYS_I2C_FPGA_ADDR
118 #define QIXIS_READ_I2C(reg) qixis_read_i2c(offsetof(struct qixis, reg))
119 #define QIXIS_WRITE_I2C(reg, value) \
120 qixis_write_i2c(offsetof(struct qixis, reg), value)
123 /* Use for SDHC adapter card type identification and operation */
124 #define QIXIS_SDID_MASK 0x07
126 #define QIXIS_ESDHC_ADAPTER_TYPE_EMMC45 0x1 /* eMMC Card Rev4.5 */
127 #define QIXIS_ESDHC_ADAPTER_TYPE_SDMMC_LEGACY 0x2 /* SD/MMC Legacy Card */
128 #define QIXIS_ESDHC_ADAPTER_TYPE_EMMC44 0x3 /* eMMC Card Rev4.4 */
129 #define QIXIS_ESDHC_ADAPTER_TYPE_RSV 0x4 /* Reserved */
130 #define QIXIS_ESDHC_ADAPTER_TYPE_MMC 0x5 /* MMC Card */
131 #define QIXIS_ESDHC_ADAPTER_TYPE_SD 0x6 /* SD Card Rev2.0 3.0 */
132 #define QIXIS_ESDHC_NO_ADAPTER 0x7 /* No Card is Present*/
134 #define QIXIS_SDHC1_S1V3 0x80 /* SDHC1: SDHC1 3.3V power control */
135 #define QIXIS_SDHC1_VS 0x30 /* BRDCFG11: route to SDHC1_VS */
137 #define QIXIS_SDCLKIN 0x08
138 #define QIXIS_SDCLKOUT 0x02
139 #define QIXIS_DAT5_6_7 0X02
140 #define QIXIS_DAT4 0X01
142 #define QIXIS_EVDD_BY_SDHC_VS 0x0c
144 #if defined(CONFIG_TARGET_LX2160AQDS) || defined(CONFIG_TARGET_LX2162AQDS) || \
145 defined(CONFIG_TARGET_LX2160ARDB)
146 #define QIXIS_XMAP_MASK 0x07
147 #define QIXIS_RST_CTL_RESET_EN 0x30
148 #define QIXIS_LBMAP_DFLTBANK 0x00
149 #define QIXIS_LBMAP_ALTBANK 0x20
150 #define QIXIS_LBMAP_QSPI 0x00
151 #define QIXIS_RCW_SRC_QSPI 0xff
152 #define QIXIS_RST_CTL_RESET 0x31
153 #define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20
154 #define QIXIS_RCFG_CTL_RECONFIG_START 0x21
155 #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08
156 #define QIXIS_LBMAP_MASK 0x0f
157 #define QIXIS_LBMAP_SD
158 #define QIXIS_LBMAP_EMMC
159 #define QIXIS_RCW_SRC_SD 0x08
160 #define QIXIS_RCW_SRC_EMMC 0x09
161 #define NON_EXTENDED_DUTCFG
164 #if defined(CONFIG_TARGET_LX2160AQDS) || defined(CONFIG_TARGET_LX2162AQDS)
165 #define QIXIS_SDID_MASK 0x07
166 #define QIXIS_ESDHC_NO_ADAPTER 0x7