1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2014 Freescale Semiconductor, Inc.
8 #include <asm/global_data.h>
10 #ifndef CONFIG_ARMV7_NONSEC
11 #error " Deep sleep needs non-secure mode support. "
13 #include <asm/secure.h>
15 #include <asm/armv7.h>
17 #if defined(CONFIG_ARCH_LS1021A)
18 #include <asm/arch/immap_ls102xa.h>
26 DECLARE_GLOBAL_DATA_PTR;
28 void __weak board_mem_sleep_setup(void)
32 void __weak board_sleep_prepare(void)
36 bool is_warm_boot(void)
38 struct ccsr_gur __iomem *gur = (void *)CFG_SYS_FSL_GUTS_ADDR;
40 if (in_be32(&gur->crstsr) & DCFG_CCSR_CRSTSR_WDRFR)
46 void fsl_dp_disable_console(void)
48 gd->flags |= GD_FLG_SILENT | GD_FLG_DISABLE_CONSOLE;
52 * When wakeup from deep sleep, the first 128 bytes space
53 * will be used to do DDR training which corrupts the data
54 * in there. This function will restore them.
56 static void dp_ddr_restore(void)
60 struct ccsr_scfg __iomem *scfg = (void *)CFG_SYS_FSL_SCFG_ADDR;
62 /* get the address of ddr date from SPARECR3 */
63 src = (u64 *)in_le32(&scfg->sparecr[2]);
64 dst = (u64 *)CFG_SYS_SDRAM_BASE;
66 for (i = 0; i < DDR_BUFF_LEN / 8; i++)
70 #if defined(CONFIG_ARMV7_PSCI) && defined(CONFIG_ARCH_LS1021A)
71 void ls1_psci_resume_fixup(void)
74 struct ccsr_scfg __iomem *scfg = (void *)CFG_SYS_FSL_SCFG_ADDR;
77 void *qixis_base = (void *)QIXIS_BASE;
79 /* Pull on PCIe RST# */
80 out_8(qixis_base + QIXIS_RST_FORCE_3, 0);
82 /* disable deep sleep signals in FPGA */
83 tmp = in_8(qixis_base + QIXIS_PWR_CTL2);
84 tmp &= ~QIXIS_PWR_CTL2_PCTL;
85 out_8(qixis_base + QIXIS_PWR_CTL2, tmp);
88 /* Disable wakeup interrupt during deep sleep */
89 out_be32(&scfg->pmcintecr, 0);
90 /* Clear PMC interrupt status */
91 out_be32(&scfg->pmcintsr, 0xffffffff);
93 /* Disable Warm Device Reset */
94 tmp = in_be32(&scfg->dpslpcr);
95 tmp &= ~SCFG_DPSLPCR_WDRR_EN;
96 out_be32(&scfg->dpslpcr, tmp);
100 static void dp_resume_prepare(void)
103 board_sleep_prepare();
108 #if defined(CONFIG_ARMV7_PSCI) && defined(CONFIG_ARCH_LS1021A)
109 ls1_psci_resume_fixup();
113 int fsl_dp_resume(void)
116 void (*kernel_resume)(void);
117 struct ccsr_scfg __iomem *scfg = (void *)CFG_SYS_FSL_SCFG_ADDR;
124 /* Get the entry address and jump to kernel */
125 start_addr = in_le32(&scfg->sparecr[3]);
126 debug("Entry address is 0x%08x\n", start_addr);
127 kernel_resume = (void (*)(void))start_addr;
128 secure_ram_addr(_do_nonsec_entry)(kernel_resume, 0, 0, 0);