3 * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
5 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm/processor.h>
15 extern void lxt971_no_sleep(void);
18 int board_early_init_f (void)
21 * IRQ 0-15 405GP internally generated; active high; level sensitive
22 * IRQ 16 405GP internally generated; active low; level sensitive
24 * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
25 * IRQ 26 (EXT IRQ 1) CAN1; active low; level sensitive
26 * IRQ 27 (EXT IRQ 2) PCI SLOT 0; active low; level sensitive
27 * IRQ 28 (EXT IRQ 3) PCI SLOT 1; active low; level sensitive
28 * IRQ 29 (EXT IRQ 4) PCI SLOT 2; active low; level sensitive
29 * IRQ 30 (EXT IRQ 5) PCI SLOT 3; active low; level sensitive
30 * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
32 mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */
33 mtdcr (UIC0ER, 0x00000000); /* disable all ints */
34 mtdcr (UIC0CR, 0x00000000); /* set all to be non-critical */
35 mtdcr (UIC0PR, 0xFFFFFF81); /* set int polarities */
36 mtdcr (UIC0TR, 0x10000000); /* set int trigger levels */
37 mtdcr (UIC0VCR, 0x00000001); /* set vect base=0,INT0 highest priority */
38 mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */
41 * EBC Configuration Register: clear EBTC -> high-Z ebc signals between
42 * transfers, set device-paced timeout to 256 cycles
44 mtebc (EBC0_CFG, 0x20400000);
50 * Check Board Identity:
55 int i = getenv_f("serial#", str, sizeof (str));
61 puts ("### No HW ID - assuming OCRTC");
64 puts ("### No HW ID - assuming ORSG");
73 * Disable sleep mode in LXT971