3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 #include <asm/processor.h>
29 #define PPC405GP_GPIO0_OR 0xef600700 /* GPIO Output */
30 #define PPC405GP_GPIO0_TCR 0xef600704 /* GPIO Three-State Control */
31 #define PPC405GP_GPIO0_ODR 0xef600718 /* GPIO Open Drain */
32 #define PPC405GP_GPIO0_IR 0xef60071c /* GPIO Input */
34 void sdram_init(void);
36 int board_early_init_f (void)
39 /*-------------------------------------------------------------------------+
40 | Interrupt controller setup for the ERIC board.
41 | Note: IRQ 0-15 405GP internally generated; active high; level sensitive
42 | IRQ 16 405GP internally generated; active low; level sensitive
44 | IRQ 25 (EXT IRQ 0) FLASH; active low; level sensitive
45 | IRQ 26 (EXT IRQ 1) PHY ; active low; level sensitive
46 | IRQ 27 (EXT IRQ 2) HOST FAIL, active low; level sensitive
47 | indicates NO Power or HOST RESET active
48 | check GPIO7 (HOST RESET#) and GPIO8 (NO Power#)
50 | IRQ 28 (EXT IRQ 3) HOST; active high; level sensitive
51 | IRQ 29 (EXT IRQ 4) PCI INTC#; active low; level sensitive
52 | IRQ 30 (EXT IRQ 5) PCI INTB#; active low; level sensitive
53 | IRQ 31 (EXT IRQ 6) PCI INTA#; active low; level sensitive
54 | -> IRQ6 Pin is NOW GPIO23 and can be activateted by setting
55 | PPC405GP_GPIO0_TCR Bit 0 = 1 (driving the output as defined in PPC405GP_GPIO0_OR,
57 | Note for ERIC board:
58 | An interrupt taken for the HOST (IRQ 28) indicates that
59 | the HOST wrote a "1" to one of the following locations
60 | - VGA CRT_GPIO0 (if R1216 is loaded)
61 | - VGA CRT_GPIO1 (if R1217 is loaded)
63 +-------------------------------------------------------------------------*/
65 mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
66 mtdcr (uicer, 0x00000000); /* disable all ints */
67 mtdcr (uiccr, 0x00000000); /* set all SMI to be non-critical */
68 mtdcr (uicpr, 0xFFFFFF88); /* set int polarities; IRQ3 to 1 */
69 mtdcr (uictr, 0x10000000); /* set int trigger levels, UART0 is EDGE */
70 mtdcr (uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */
71 mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
73 mtdcr (cntrl0, 0x00002000); /* set IRQ6 as GPIO23 to generate an interrupt request to the PCP2PCI bridge */
75 out32 (PPC405GP_GPIO0_OR, 0x60000000); /*fixme is SMB_INT high or low active??; IRQ6 is GPIO23 output */
76 out32 (PPC405GP_GPIO0_TCR, 0x7E400000);
82 /* ------------------------------------------------------------------------- */
85 * Check Board Identity:
90 char *s = getenv ("serial#");
95 if (!s || strncmp (s, "ERIC", 9)) {
96 puts ("### No HW ID - assuming ERIC");
98 for (e = s; *e; ++e) {
115 /* ------------------------------------------------------------------------- */
116 /* ------------------------------------------------------------------------- */
117 /* ------------------------------------------------------------------------- */
119 initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of
120 the necessary info for SDRAM controller configuration
122 /* ------------------------------------------------------------------------- */
123 /* ------------------------------------------------------------------------- */
124 phys_size_t initdram (int board_type)
128 unsigned char datain[128];
133 * ToDo: Move the asm init routine sdram_init() to this C file,
134 * or even better use some common ppc4xx code available
141 * we have no EEPROM on ERIC
142 * so let init.S do the init job for SDRAM
143 * and simply return 32MByte here
145 return (CONFIG_SYS_SDRAM_SIZE * 1024 * 1024);
148 /* Read Serial Presence Detect Information */
149 for (i = 0; i < 128; i++)
151 i2c_send (SPD_EEPROM_ADDRESS, 0, 1, datain, 128);
152 printf ("\nReading DIMM...\n");
154 for (i = 0; i < 128; i++) {
155 printf ("%d=0x%x ", i, datain[i]);
156 if (((i + 1) % 10) == 0)
162 /*****************************/
163 /* Retrieve interesting data */
164 /*****************************/
165 /* size of a SDRAM bank */
166 /* Number of bytes per side / number of banks per side */
167 if (datain[31] == 0x08)
169 else if (datain[31] == 0x10)
172 printf ("IIC READ ERROR!!!\n");
176 /* single-sided DIMM or double-sided DIMM? */
177 if (datain[5] != 1) {
178 /* double-sided DIMM => SDRAM banks 0..3 are valid */
179 printf ("double-sided DIMM\n");
182 /* else single-sided DIMM => SDRAM bank 0 and bank 2 are valid */
184 printf ("single-sided DIMM\n");
188 /* return size in Mb unit => *(1024*1024) */
189 return (TotalSize * 1024 * 1024);
193 /* ------------------------------------------------------------------------- */
197 /* TODO: XXX XXX XXX */
198 printf ("test: xxx MB - ok\n");
203 /* ------------------------------------------------------------------------- */