common: Drop log.h from common header
[platform/kernel/u-boot.git] / board / engicam / common / board.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2016 Amarula Solutions B.V.
4  * Copyright (C) 2016 Engicam S.r.l.
5  * Author: Jagan Teki <jagan@amarulasolutions.com>
6  */
7
8 #include <common.h>
9 #include <command.h>
10 #include <env.h>
11 #include <hang.h>
12 #include <init.h>
13 #include <log.h>
14 #include <mmc.h>
15 #include <asm/arch/clock.h>
16 #include <asm/arch/imx-regs.h>
17 #include <asm/arch/sys_proto.h>
18 #include <watchdog.h>
19
20 #include "board.h"
21
22 DECLARE_GLOBAL_DATA_PTR;
23
24 #ifdef CONFIG_ENV_IS_IN_MMC
25 static void mmc_late_init(void)
26 {
27         char cmd[32];
28         char mmcblk[32];
29         u32 dev_no = mmc_get_env_dev();
30
31         env_set_ulong("mmcdev", dev_no);
32
33         /* Set mmcblk env */
34         sprintf(mmcblk, "/dev/mmcblk%dp2 rootwait rw", dev_no);
35         env_set("mmcroot", mmcblk);
36
37         sprintf(cmd, "mmc dev %d", dev_no);
38         run_command(cmd, 0);
39 }
40 #endif
41
42 enum engicam_boards {
43         IMX6Q_ICORE,
44         IMX6DL_ICORE,
45         IMX6Q_ICORE_MIPI,
46         IMX6DL_ICORE_MIPI,
47         IMX6Q_ICORE_RQS,
48         IMX6DL_ICORE_RQS,
49         IMX6UL_GEAM,
50         IMX6UL_ISIOT_EMMC,
51         IMX6UL_ISIOT_NAND,
52         ENGICAM_BOARDS,
53 };
54
55 static const char * const board_fdt_file[ENGICAM_BOARDS] = {
56         [IMX6Q_ICORE] = "imx6q-icore.dtb",
57         [IMX6DL_ICORE] = "imx6dl-icore.dtb",
58         [IMX6Q_ICORE_MIPI] = "imx6q-icore-mipi.dtb",
59         [IMX6DL_ICORE_MIPI] = "imx6dl-icore-mipi.dtb",
60         [IMX6Q_ICORE_RQS] = "imx6q-icore-rqs.dtb",
61         [IMX6DL_ICORE_RQS] = "imx6dl-icore-rqs.dtb",
62         [IMX6UL_GEAM] = "imx6ul-geam.dtb",
63         [IMX6UL_ISIOT_EMMC] = "imx6ul-isiot-emmc.dtb",
64         [IMX6UL_ISIOT_NAND] = "imx6ul-isiot-nand.dtb",
65 };
66
67 static int setenv_fdt_file(int board_detected)
68 {
69         if (board_detected < 0 || board_detected >= ENGICAM_BOARDS)
70                 return -EINVAL;
71
72         if (!board_fdt_file[board_detected])
73                 return -ENODEV;
74
75         env_set("fdt_file", board_fdt_file[board_detected]);
76         return 0;
77 }
78
79 static enum engicam_boards engicam_board_detect(void)
80 {
81         const char *cmp_dtb = CONFIG_DEFAULT_DEVICE_TREE;
82
83         if (!strcmp(cmp_dtb, "imx6q-icore")) {
84                 if (is_mx6dq())
85                         return IMX6Q_ICORE;
86                 else if (is_mx6dl() || is_mx6solo())
87                         return IMX6DL_ICORE;
88         } else if (!strcmp(cmp_dtb, "imx6q-icore-mipi")) {
89                 if (is_mx6dq())
90                         return IMX6Q_ICORE_MIPI;
91                 else if (is_mx6dl() || is_mx6solo())
92                         return IMX6DL_ICORE_MIPI;
93         } else if (!strcmp(cmp_dtb, "imx6q-icore-rqs")) {
94                 if (is_mx6dq())
95                         return IMX6Q_ICORE_RQS;
96                 else if (is_mx6dl() || is_mx6solo())
97                         return IMX6DL_ICORE_RQS;
98         } else if (!strcmp(cmp_dtb, "imx6ul-geam"))
99                         return IMX6UL_GEAM;
100         else if (!strcmp(cmp_dtb, "imx6ul-isiot-emmc"))
101                         return IMX6UL_ISIOT_EMMC;
102         else if (!strcmp(cmp_dtb, "imx6ul-isiot-nand"))
103                         return IMX6UL_ISIOT_NAND;
104
105         return -EINVAL;
106 }
107
108 static int fixup_enet_clock(enum engicam_boards board_detected)
109 {
110         struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
111         int clk_internal = 0;
112
113         switch (board_detected) {
114         case IMX6Q_ICORE_MIPI:
115         case IMX6DL_ICORE_MIPI:
116                 clk_internal = 1;
117                 break;
118         default:
119                 break;
120         }
121
122         /* set gpr1[21] to select anatop clock */
123         debug("fixup_enet_clock %d\n", clk_internal);
124         clrsetbits_le32(&iomuxc_regs->gpr[1], 0x1 << 21, clk_internal << 21);
125
126         if (!clk_internal) {
127                 /* clock is external */
128                 return 0;
129         }
130
131         return enable_fec_anatop_clock(0, ENET_50MHZ);
132 }
133
134 int board_late_init(void)
135 {
136         enum engicam_boards board_detected = IMX6Q_ICORE;
137
138         switch ((imx6_src_get_boot_mode() & IMX6_BMODE_MASK) >>
139                         IMX6_BMODE_SHIFT) {
140         case IMX6_BMODE_SD:
141         case IMX6_BMODE_ESD:
142         case IMX6_BMODE_MMC:
143         case IMX6_BMODE_EMMC:
144 #ifdef CONFIG_ENV_IS_IN_MMC
145                 mmc_late_init();
146 #endif
147                 env_set("modeboot", "mmcboot");
148                 break;
149         case IMX6_BMODE_NAND_MIN ... IMX6_BMODE_NAND_MAX:
150                 env_set("modeboot", "nandboot");
151                 break;
152         default:
153                 env_set("modeboot", "");
154                 break;
155         }
156
157         if (is_mx6ul())
158                 env_set("console", "ttymxc0");
159         else
160                 env_set("console", "ttymxc3");
161
162         board_detected = engicam_board_detect();
163         if (board_detected < 0)
164                 hang();
165
166         fixup_enet_clock(board_detected);
167         setenv_fdt_file(board_detected);
168
169 #ifdef CONFIG_HW_WATCHDOG
170         hw_watchdog_init();
171 #endif
172
173         return 0;
174 }
175
176 int board_init(void)
177 {
178         /* Address of boot parameters */
179         gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
180
181 #ifdef CONFIG_NAND_MXS
182         setup_gpmi_nand();
183 #endif
184
185 #ifdef CONFIG_VIDEO_IPUV3
186         setup_display();
187 #endif
188
189         return 0;
190 }
191
192 int dram_init(void)
193 {
194         gd->ram_size = imx_ddr_size();
195
196         return 0;
197 }