1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2017 Tuomas Tynkkynen
12 #include <virtio_types.h>
16 #include <asm/armv8/mmu.h>
18 static struct mm_region qemu_arm64_mem_map[] = {
24 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
27 /* Lowmem peripherals */
31 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
33 PTE_BLOCK_PXN | PTE_BLOCK_UXN
38 .size = 255UL * SZ_1G,
39 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
42 /* Highmem PCI-E ECAM memory area */
43 .virt = 0x4010000000ULL,
44 .phys = 0x4010000000ULL,
46 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
48 PTE_BLOCK_PXN | PTE_BLOCK_UXN
50 /* Highmem PCI-E MMIO memory area */
51 .virt = 0x8000000000ULL,
52 .phys = 0x8000000000ULL,
53 .size = 0x8000000000ULL,
54 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
56 PTE_BLOCK_PXN | PTE_BLOCK_UXN
63 struct mm_region *mem_map = qemu_arm64_mem_map;
69 * Make sure virtio bus is enumerated so that peripherals
70 * on the virtio bus can be discovered by their drivers
79 if (fdtdec_setup_mem_size_base() != 0)
85 int dram_init_banksize(void)
87 fdtdec_setup_memory_banksize();
92 void *board_fdt_blob_setup(void)
94 /* QEMU loads a generated DTB for us at the start of RAM. */
95 return (void *)CONFIG_SYS_SDRAM_BASE;
98 void enable_caches(void)
104 #if defined(CONFIG_EFI_RNG_PROTOCOL)
105 #include <efi_loader.h>
108 #include <dm/device-internal.h>
110 efi_status_t platform_get_rng_device(struct udevice **dev)
113 efi_status_t status = EFI_DEVICE_ERROR;
114 struct udevice *bus, *devp;
116 for (uclass_first_device(UCLASS_VIRTIO, &bus); bus;
117 uclass_next_device(&bus)) {
118 for (device_find_first_child(bus, &devp); devp;
119 device_find_next_child(&devp)) {
120 if (device_get_uclass_id(devp) == UCLASS_RNG) {
122 status = EFI_SUCCESS;
128 if (status != EFI_SUCCESS) {
129 debug("No rng device found\n");
130 return EFI_DEVICE_ERROR;
134 ret = device_probe(*dev);
136 return EFI_DEVICE_ERROR;
138 debug("Couldn't get child device\n");
139 return EFI_DEVICE_ERROR;
144 #endif /* CONFIG_EFI_RNG_PROTOCOL */
152 u8 flash_read8(void *addr)
156 asm("ldrb %" __W "0, %1" : "=r"(ret) : "m"(*(u8 *)addr));
160 u16 flash_read16(void *addr)
164 asm("ldrh %" __W "0, %1" : "=r"(ret) : "m"(*(u16 *)addr));
168 u32 flash_read32(void *addr)
172 asm("ldr %" __W "0, %1" : "=r"(ret) : "m"(*(u32 *)addr));
176 void flash_write8(u8 value, void *addr)
178 asm("strb %" __W "1, %0" : "=m"(*(u8 *)addr) : "r"(value));
181 void flash_write16(u16 value, void *addr)
183 asm("strh %" __W "1, %0" : "=m"(*(u16 *)addr) : "r"(value));
186 void flash_write32(u32 value, void *addr)
188 asm("str %" __W "1, %0" : "=m"(*(u32 *)addr) : "r"(value));