board/emk/top860/top860.c

   1 /*
   2  * (C) Copyright 2003
   3  * EMK Elektronik GmbH <www.emk-elektronik.de>
   4  * Reinhard Meyer <r.meyer@emk-elektronik.de>
   5  *
   6  * Board specific routines for the TOP860
   7  *
   8  * - initialisation
   9  * - interface to VPD data (mac address, clock speeds)
  10  * - memory controller
  11  * - serial io initialisation
  12  * - ethernet io initialisation
  13  *
  14  * -----------------------------------------------------------------
  15  * See file CREDITS for list of people who contributed to this
  16  * project.
  17  *
  18  * This program is free software; you can redistribute it and/or
  19  * modify it under the terms of the GNU General Public License as
  20  * published by the Free Software Foundation; either version 2 of
  21  * the License, or (at your option) any later version.
  22  *
  23  * This program is distributed in the hope that it will be useful,
  24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  * GNU General Public License for more details.
  27  *
  28  * You should have received a copy of the GNU General Public License
  29  * along with this program; if not, write to the Free Software
  30  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  31  * MA 02111-1307 USA
  32  */
  33
  34 #include <common.h>
  35 #include <commproc.h>
  36 #include <mpc8xx.h>
  37
  38 /*****************************************************************************
  39  * UPM table for 60ns EDO RAM at 25 MHz bus/external clock
  40  *****************************************************************************/
  41 static const uint edo_60ns_25MHz_tbl[] = {
  42
  43 /* single read   (offset 0x00 in upm ram) */
  44     0x0ff3fc04,0x08f3fc04,0x00f3fc04,0x00f3fc00,
  45     0x33f7fc07,0xfffffc05,0xfffffc05,0xfffffc05,
  46 /* burst read    (offset 0x08 in upm ram) */
  47     0x0ff3fc04,0x08f3fc04,0x00f3fc0c,0x0ff3fc40,
  48     0x0cf3fc04,0x03f3fc48,0x0cf3fc04,0x03f3fc48,
  49     0x0cf3fc04,0x03f3fc00,0x3ff7fc07,0xfffffc05,
  50     0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05,
  51 /* single write  (offset 0x18 in upm ram) */
  52     0x0ffffc04,0x08fffc04,0x30fffc00,0xf1fffc07,
  53     0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05,
  54 /* burst write   (offset 0x20 in upm ram) */
  55     0x0ffffc04,0x08fffc00,0x00fffc04,0x03fffc4c,
  56     0x00fffc00,0x07fffc4c,0x00fffc00,0x0ffffc4c,
  57     0x00fffc00,0x3ffffc07,0xfffffc05,0xfffffc05,
  58     0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05,
  59 /* refresh       (offset 0x30 in upm ram) */
  60     0xc0fffc04,0x07fffc04,0x0ffffc04,0x0ffffc04,
  61     0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05,
  62     0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05,
  63 /* exception     (offset 0x3C in upm ram) */
  64     0xfffffc07,0xfffffc03,0xfffffc05,0xfffffc05,
  65 };
  66
  67 /*****************************************************************************
  68  * Print Board Identity
  69  *****************************************************************************/
  70 int checkboard (void)
  71 {
  72         puts ("Board:"CONFIG_IDENT_STRING"\n");
  73         return (0);
  74 }
  75
  76 /*****************************************************************************
  77  * Initialize DRAM controller
  78  *****************************************************************************/
  79 phys_size_t initdram (int board_type)
  80 {
  81         volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
  82         volatile memctl8xx_t *memctl = &immap->im_memctl;
  83
  84         /*
  85          * Only initialize memory controller when running from FLASH.
  86          * When running from RAM, don't touch it.
  87          */
  88         if ((ulong) initdram & 0xff000000) {
  89                 volatile uint *addr1, *addr2;
  90                 uint i, j;
  91
  92                 upmconfig (UPMA, (uint *) edo_60ns_25MHz_tbl,
  93                            sizeof (edo_60ns_25MHz_tbl) / sizeof (uint));
  94                 memctl->memc_mptpr = 0x0200;
  95                 memctl->memc_mamr = 0x0ca20330;
  96                 memctl->memc_or2 = -CONFIG_SYS_DRAM_MAX | OR_CSNT_SAM;
  97                 memctl->memc_br2 = CONFIG_SYS_DRAM_BASE | BR_MS_UPMA | BR_V;
  98                 /*
  99                  * Do 8 read accesses to DRAM
 100                  */
 101                 addr1 = (volatile uint *) 0;
 102                 addr2 = (volatile uint *) 0x00400000;
 103                 for (i = 0, j = 0; i < 8; i++)
 104                         j = addr1[0];
 105
 106                 /*
 107                  * Now check whether we got 4MB or 16MB populated
 108                  */
 109                 addr1[0] = 0x12345678;
 110                 addr1[1] = 0x9abcdef0;
 111                 addr2[0] = 0xfeedc0de;
 112                 addr2[1] = 0x47110815;
 113                 if (addr1[0] == 0xfeedc0de && addr1[1] == 0x47110815) {
 114                         /* only 4MB populated */
 115                         memctl->memc_or2 = -(CONFIG_SYS_DRAM_MAX / 4) | OR_CSNT_SAM;
 116                 }
 117         }
 118
 119         return -(memctl->memc_or2 & 0xffff0000);
 120 }
 121
 122 /*****************************************************************************
 123  * prepare for FLASH detection
 124  *****************************************************************************/
 125 void flash_preinit(void)
 126 {
 127 }
 128
 129 /*****************************************************************************
 130  * finalize FLASH setup
 131  *****************************************************************************/
 132 void flash_afterinit(uint bank, ulong start, ulong size)
 133 {
 134 }
 135
 136 /*****************************************************************************
 137  * otherinits after RAM is there and we are relocated to RAM
 138  * note: though this is an int function, nobody cares for the result!
 139  *****************************************************************************/
 140 int misc_init_r (void)
 141 {
 142         /* read 'factory' part of EEPROM */
 143         extern void read_factory_r (void);
 144         read_factory_r ();
 145
 146         return (0);
 147 }