2 * Copyright (C) 2008 Atmel Corporation
4 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm/sdram.h>
11 #include <asm/arch/clk.h>
12 #include <asm/arch/hmatrix.h>
13 #include <asm/arch/mmu.h>
14 #include <asm/arch/portmux.h>
16 DECLARE_GLOBAL_DATA_PTR;
18 struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = {
20 .virt_pgno = CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT,
21 .nr_pages = CONFIG_SYS_FLASH_SIZE >> MMU_PAGE_SHIFT,
22 .phys = (CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT)
25 .virt_pgno = CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT,
26 .nr_pages = EBI_SDRAM_SIZE >> MMU_PAGE_SHIFT,
27 .phys = (CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT)
28 | MMU_VMR_CACHE_WRBACK,
32 static const struct sdram_config sdram_config = {
33 /* MT48LC4M32B2P-6 (16 MB) */
34 .data_bits = SDRAM_DATA_32BIT,
46 .refresh_period = (156 * (SDRAMC_BUS_HZ / 1000)) / 10000,
49 int board_early_init_f(void)
51 /* Enable SDRAM in the EBI mux */
52 hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE));
54 portmux_enable_ebi(32, 23, 0, PORTMUX_DRIVE_HIGH);
56 sdram_init(uncached(EBI_SDRAM_BASE), &sdram_config);
58 portmux_enable_usart3(PORTMUX_DRIVE_MIN);
59 #if defined(CONFIG_MACB)
60 portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH);
62 #if defined(CONFIG_MMC)
63 portmux_enable_mmci(0, PORTMUX_MMCI_4BIT, PORTMUX_DRIVE_LOW);
69 int board_early_init_r(void)
71 gd->bd->bi_phy_id[0] = 0x01;
75 #if defined(CONFIG_MACB) && defined(CONFIG_CMD_NET)
76 int board_eth_init(bd_t *bi)
78 return macb_eth_initialize(0, (void *)ATMEL_BASE_MACB0,