board/davinci/schmoogie/dv_board.c

   1 /*
   2  * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
   3  *
   4  * Parts are shamelessly stolen from various TI sources, original copyright
   5  * follows:
   6  * -----------------------------------------------------------------
   7  *
   8  * Copyright (C) 2004 Texas Instruments.
   9  *
  10  * ----------------------------------------------------------------------------
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License as published by
  13  * the Free Software Foundation; either version 2 of the License, or
  14  * (at your option) any later version.
  15  *
  16  * This program is distributed in the hope that it will be useful,
  17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  * GNU General Public License for more details.
  20  *
  21  *  You should have received a copy of the GNU General Public License
  22  *  along with this program; if not, write to the Free Software
  23  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  24  * ----------------------------------------------------------------------------
  25  */
  26
  27 #include <common.h>
  28 #include <i2c.h>
  29 #include <asm/arch/hardware.h>
  30 #include <asm/arch/emac_defs.h>
  31
  32 DECLARE_GLOBAL_DATA_PTR;
  33
  34 extern void     timer_init(void);
  35 extern int      eth_hw_init(void);
  36
  37
  38 /* Works on Always On power domain only (no PD argument) */
  39 void lpsc_on(unsigned int id)
  40 {
  41         dv_reg_p        mdstat, mdctl;
  42
  43         if (id >= DAVINCI_LPSC_GEM)
  44                 return;                 /* Don't work on DSP Power Domain */
  45
  46         mdstat = REG_P(PSC_MDSTAT_BASE + (id * 4));
  47         mdctl = REG_P(PSC_MDCTL_BASE + (id * 4));
  48
  49         while (REG(PSC_PTSTAT) & 0x01) {;}
  50
  51         if ((*mdstat & 0x1f) == 0x03)
  52                 return;                 /* Already on and enabled */
  53
  54         *mdctl |= 0x03;
  55
  56         /* Special treatment for some modules as for sprue14 p.7.4.2 */
  57         if (    (id == DAVINCI_LPSC_VPSSSLV) ||
  58                 (id == DAVINCI_LPSC_EMAC) ||
  59                 (id == DAVINCI_LPSC_EMAC_WRAPPER) ||
  60                 (id == DAVINCI_LPSC_MDIO) ||
  61                 (id == DAVINCI_LPSC_USB) ||
  62                 (id == DAVINCI_LPSC_ATA) ||
  63                 (id == DAVINCI_LPSC_VLYNQ) ||
  64                 (id == DAVINCI_LPSC_UHPI) ||
  65                 (id == DAVINCI_LPSC_DDR_EMIF) ||
  66                 (id == DAVINCI_LPSC_AEMIF) ||
  67                 (id == DAVINCI_LPSC_MMC_SD) ||
  68                 (id == DAVINCI_LPSC_MEMSTICK) ||
  69                 (id == DAVINCI_LPSC_McBSP) ||
  70                 (id == DAVINCI_LPSC_GPIO)
  71            )
  72                 *mdctl |= 0x200;
  73
  74         REG(PSC_PTCMD) = 0x01;
  75
  76         while (REG(PSC_PTSTAT) & 0x03) {;}
  77         while ((*mdstat & 0x1f) != 0x03) {;}    /* Probably an overkill... */
  78 }
  79
  80 void dsp_on(void)
  81 {
  82         int     i;
  83
  84         if (REG(PSC_PDSTAT1) & 0x1f)
  85                 return;                 /* Already on */
  86
  87         REG(PSC_GBLCTL) |= 0x01;
  88         REG(PSC_PDCTL1) |= 0x01;
  89         REG(PSC_PDCTL1) &= ~0x100;
  90         REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) |= 0x03;
  91         REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) &= 0xfffffeff;
  92         REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) |= 0x03;
  93         REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) &= 0xfffffeff;
  94         REG(PSC_PTCMD) = 0x02;
  95
  96         for (i = 0; i < 100; i++) {
  97                 if (REG(PSC_EPCPR) & 0x02)
  98                         break;
  99         }
 100
 101         REG(PSC_CHP_SHRTSW) = 0x01;
 102         REG(PSC_PDCTL1) |= 0x100;
 103         REG(PSC_EPCCR) = 0x02;
 104
 105         for (i = 0; i < 100; i++) {
 106                 if (!(REG(PSC_PTSTAT) & 0x02))
 107                         break;
 108         }
 109
 110         REG(PSC_GBLCTL) &= ~0x1f;
 111 }
 112
 113
 114 int board_init(void)
 115 {
 116         /* arch number of the board */
 117         gd->bd->bi_arch_number = MACH_TYPE_SCHMOOGIE;
 118
 119         /* address of boot parameters */
 120         gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
 121
 122         /* Workaround for TMS320DM6446 errata 1.3.22 */
 123         REG(PSC_SILVER_BULLET) = 0;
 124
 125         /* Power on required peripherals */
 126         lpsc_on(DAVINCI_LPSC_EMAC);
 127         lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER);
 128         lpsc_on(DAVINCI_LPSC_MDIO);
 129         lpsc_on(DAVINCI_LPSC_I2C);
 130         lpsc_on(DAVINCI_LPSC_UART0);
 131         lpsc_on(DAVINCI_LPSC_TIMER1);
 132         lpsc_on(DAVINCI_LPSC_GPIO);
 133
 134         /* Powerup the DSP */
 135         dsp_on();
 136
 137         /* Bringup UART0 out of reset */
 138         REG(UART0_PWREMU_MGMT) = 0x0000e003;
 139
 140         /* Enable GIO3.3V cells used for EMAC */
 141         REG(VDD3P3V_PWDN) = 0;
 142
 143         /* Enable UART0 MUX lines */
 144         REG(PINMUX1) |= 1;
 145
 146         /* Enable EMAC and AEMIF pins */
 147         REG(PINMUX0) = 0x80000c1f;
 148
 149         /* Enable I2C pin Mux */
 150         REG(PINMUX1) |= (1 << 7);
 151
 152         /* Set the Bus Priority Register to appropriate value */
 153         REG(VBPR) = 0x20;
 154
 155         timer_init();
 156
 157         return(0);
 158 }
 159
 160 int misc_init_r (void)
 161 {
 162         u_int8_t        tmp[20], buf[10];
 163         int             i = 0;
 164         int             clk = 0;
 165
 166         /* Set serial number from UID chip */
 167         u_int8_t        crc_tbl[256] = {
 168                         0x00, 0x5e, 0xbc, 0xe2, 0x61, 0x3f, 0xdd, 0x83,
 169                         0xc2, 0x9c, 0x7e, 0x20, 0xa3, 0xfd, 0x1f, 0x41,
 170                         0x9d, 0xc3, 0x21, 0x7f, 0xfc, 0xa2, 0x40, 0x1e,
 171                         0x5f, 0x01, 0xe3, 0xbd, 0x3e, 0x60, 0x82, 0xdc,
 172                         0x23, 0x7d, 0x9f, 0xc1, 0x42, 0x1c, 0xfe, 0xa0,
 173                         0xe1, 0xbf, 0x5d, 0x03, 0x80, 0xde, 0x3c, 0x62,
 174                         0xbe, 0xe0, 0x02, 0x5c, 0xdf, 0x81, 0x63, 0x3d,
 175                         0x7c, 0x22, 0xc0, 0x9e, 0x1d, 0x43, 0xa1, 0xff,
 176                         0x46, 0x18, 0xfa, 0xa4, 0x27, 0x79, 0x9b, 0xc5,
 177                         0x84, 0xda, 0x38, 0x66, 0xe5, 0xbb, 0x59, 0x07,
 178                         0xdb, 0x85, 0x67, 0x39, 0xba, 0xe4, 0x06, 0x58,
 179                         0x19, 0x47, 0xa5, 0xfb, 0x78, 0x26, 0xc4, 0x9a,
 180                         0x65, 0x3b, 0xd9, 0x87, 0x04, 0x5a, 0xb8, 0xe6,
 181                         0xa7, 0xf9, 0x1b, 0x45, 0xc6, 0x98, 0x7a, 0x24,
 182                         0xf8, 0xa6, 0x44, 0x1a, 0x99, 0xc7, 0x25, 0x7b,
 183                         0x3a, 0x64, 0x86, 0xd8, 0x5b, 0x05, 0xe7, 0xb9,
 184                         0x8c, 0xd2, 0x30, 0x6e, 0xed, 0xb3, 0x51, 0x0f,
 185                         0x4e, 0x10, 0xf2, 0xac, 0x2f, 0x71, 0x93, 0xcd,
 186                         0x11, 0x4f, 0xad, 0xf3, 0x70, 0x2e, 0xcc, 0x92,
 187                         0xd3, 0x8d, 0x6f, 0x31, 0xb2, 0xec, 0x0e, 0x50,
 188                         0xaf, 0xf1, 0x13, 0x4d, 0xce, 0x90, 0x72, 0x2c,
 189                         0x6d, 0x33, 0xd1, 0x8f, 0x0c, 0x52, 0xb0, 0xee,
 190                         0x32, 0x6c, 0x8e, 0xd0, 0x53, 0x0d, 0xef, 0xb1,
 191                         0xf0, 0xae, 0x4c, 0x12, 0x91, 0xcf, 0x2d, 0x73,
 192                         0xca, 0x94, 0x76, 0x28, 0xab, 0xf5, 0x17, 0x49,
 193                         0x08, 0x56, 0xb4, 0xea, 0x69, 0x37, 0xd5, 0x8b,
 194                         0x57, 0x09, 0xeb, 0xb5, 0x36, 0x68, 0x8a, 0xd4,
 195                         0x95, 0xcb, 0x29, 0x77, 0xf4, 0xaa, 0x48, 0x16,
 196                         0xe9, 0xb7, 0x55, 0x0b, 0x88, 0xd6, 0x34, 0x6a,
 197                         0x2b, 0x75, 0x97, 0xc9, 0x4a, 0x14, 0xf6, 0xa8,
 198                         0x74, 0x2a, 0xc8, 0x96, 0x15, 0x4b, 0xa9, 0xf7,
 199                         0xb6, 0xe8, 0x0a, 0x54, 0xd7, 0x89, 0x6b, 0x35
 200                 };
 201
 202         clk = ((REG(PLL2_PLLM) + 1) * 27) / ((REG(PLL2_DIV2) & 0x1f) + 1);
 203
 204         printf ("ARM Clock : %dMHz\n", ((REG(PLL1_PLLM) + 1) * 27 ) / 2);
 205         printf ("DDR Clock : %dMHz\n", (clk / 2));
 206
 207         /* Set serial number from UID chip */
 208         if (i2c_read(CFG_UID_ADDR, 0, 1, buf, 8)) {
 209                 printf("\nUID @ 0x%02x read FAILED!!!\n", CFG_UID_ADDR);
 210                 forceenv("serial#", "FAILED");
 211         } else {
 212                 if (buf[0] != 0x70) {   /* Device Family Code */
 213                         printf("\nUID @ 0x%02x read FAILED!!!\n", CFG_UID_ADDR);
 214                         forceenv("serial#", "FAILED");
 215                 }
 216         }
 217         /* Now check CRC */
 218         tmp[0] = 0;
 219         for (i = 0; i < 8; i++)
 220                 tmp[0] = crc_tbl[tmp[0] ^ buf[i]];
 221
 222         if (tmp[0] != 0) {
 223                 printf("\nUID @ 0x%02x - BAD CRC!!!\n", CFG_UID_ADDR);
 224                 forceenv("serial#", "FAILED");
 225         } else {
 226                 /* CRC OK, set "serial" env variable */
 227                 sprintf((char *)&tmp[0], "%02x%02x%02x%02x%02x%02x",
 228                         buf[6], buf[5], buf[4], buf[3], buf[2], buf[1]);
 229                 forceenv("serial#", (char *)&tmp[0]);
 230         }
 231
 232         if (!eth_hw_init())
 233                 printf("ethernet init failed!\n");
 234
 235         return(0);
 236 }
 237
 238 int dram_init(void)
 239 {
 240         gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 241         gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 242
 243         return(0);
 244 }