2 * Modified for Hawkboard - Syed Mohammed Khasim <khasim@beagleboard.org>
4 * Copyright (C) 2008 Sekhar Nori, Texas Instruments, Inc. <nsekhar@ti.com>
5 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
6 * Copyright (C) 2004 Texas Instruments.
7 * Copyright (C) 2012 Sughosh Ganu <urwithsughosh@gmail.com>.
9 * ----------------------------------------------------------------------------
10 * SPDX-License-Identifier: GPL-2.0+
11 * ----------------------------------------------------------------------------
15 #include <asm/errno.h>
16 #include <asm/arch/hardware.h>
18 #include <asm/arch/davinci_misc.h>
19 #include <asm/arch/pinmux_defs.h>
20 #include <asm/arch/da8xx-usb.h>
23 DECLARE_GLOBAL_DATA_PTR;
25 const struct pinmux_resource pinmuxes[] = {
26 PINMUX_ITEM(emac_pins_mii),
27 PINMUX_ITEM(emac_pins_mdio),
28 PINMUX_ITEM(emifa_pins_cs3),
29 PINMUX_ITEM(emifa_pins_cs4),
30 PINMUX_ITEM(emifa_pins_nand),
31 PINMUX_ITEM(uart2_pins_txrx),
32 PINMUX_ITEM(uart2_pins_rtscts),
35 const int pinmuxes_size = ARRAY_SIZE(pinmuxes);
37 const struct lpsc_resource lpsc[] = {
38 { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
39 { DAVINCI_LPSC_SPI1 }, /* Serial Flash */
40 { DAVINCI_LPSC_EMAC }, /* image download */
41 { DAVINCI_LPSC_UART2 }, /* console */
42 { DAVINCI_LPSC_GPIO },
45 const int lpsc_size = ARRAY_SIZE(lpsc);
49 /* arch number of the board */
50 gd->bd->bi_arch_number = MACH_TYPE_OMAPL138_HAWKBOARD;
52 /* address of boot parameters */
53 gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
58 int board_early_init_f(void)
61 * Kick Registers need to be set to allow access to Pin Mux registers
63 writel(DV_SYSCFG_KICK0_UNLOCK, &davinci_syscfg_regs->kick0);
64 writel(DV_SYSCFG_KICK1_UNLOCK, &davinci_syscfg_regs->kick1);
66 /* set cfgchip3 to select mii */
67 writel(readl(&davinci_syscfg_regs->cfgchip3) &
68 ~(1 << 8), &davinci_syscfg_regs->cfgchip3);
77 printf("ARM Clock : %s MHz\n",
78 strmhz(buf, clk_get(DAVINCI_ARM_CLKID)));
88 cfgchip2 = readl(&davinci_syscfg_regs->cfgchip2);
90 cfgchip2 &= ~(CFGCHIP2_RESET | CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN |
91 CFGCHIP2_OTGMODE | CFGCHIP2_REFFREQ |
92 CFGCHIP2_USB1PHYCLKMUX);
93 cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN | CFGCHIP2_PHY_PLLON |
94 CFGCHIP2_REFFREQ_24MHZ | CFGCHIP2_USB2PHYCLKMUX |
95 CFGCHIP2_USB1SUSPENDM;
97 writel(cfgchip2, &davinci_syscfg_regs->cfgchip2);
99 /* wait until the usb phy pll locks */
100 timeout = DA8XX_USB_OTG_TIMEOUT;
102 if (readl(&davinci_syscfg_regs->cfgchip2) & CFGCHIP2_PHYCLKGD)
105 /* USB phy was not turned on */
109 void usb_phy_off(void)
114 * Power down the on-chip PHY.
116 cfgchip2 = readl(&davinci_syscfg_regs->cfgchip2);
117 cfgchip2 &= ~(CFGCHIP2_PHY_PLLON | CFGCHIP2_USB1SUSPENDM);
118 cfgchip2 |= CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN | CFGCHIP2_RESET;
119 writel(cfgchip2, &davinci_syscfg_regs->cfgchip2);