1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
5 * Based on da830evm.c. Original Copyrights follow:
7 * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
8 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
13 #include <environment.h>
18 #include <spi_flash.h>
19 #include <asm/arch/hardware.h>
20 #include <asm/ti-common/davinci_nand.h>
21 #include <asm/arch/emac_defs.h>
22 #include <asm/arch/pinmux_defs.h>
24 #include <asm/arch/davinci_misc.h>
25 #include <linux/errno.h>
27 #include <asm/mach-types.h>
30 #ifdef CONFIG_MMC_DAVINCI
32 #include <asm/arch/sdmmc_defs.h>
35 DECLARE_GLOBAL_DATA_PTR;
37 #ifdef CONFIG_DRIVER_TI_EMAC
38 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
43 #endif /* CONFIG_DRIVER_TI_EMAC */
45 #define CFG_MAC_ADDR_SPI_BUS 0
46 #define CFG_MAC_ADDR_SPI_CS 0
47 #define CFG_MAC_ADDR_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
48 #define CFG_MAC_ADDR_SPI_MODE SPI_MODE_3
50 #define CFG_MAC_ADDR_OFFSET (flash->size - SZ_64K)
52 #ifdef CONFIG_MAC_ADDR_IN_SPIFLASH
53 static int get_mac_addr(u8 *addr)
55 struct spi_flash *flash;
58 flash = spi_flash_probe(CFG_MAC_ADDR_SPI_BUS, CFG_MAC_ADDR_SPI_CS,
59 CFG_MAC_ADDR_SPI_MAX_HZ, CFG_MAC_ADDR_SPI_MODE);
61 printf("Error - unable to probe SPI flash.\n");
65 ret = spi_flash_read(flash, (CFG_MAC_ADDR_OFFSET) + 1, 7, addr);
67 printf("Error - unable to read MAC address from SPI flash.\n");
75 void dsp_lpsc_on(unsigned domain, unsigned int id)
77 dv_reg_p mdstat, mdctl, ptstat, ptcmd;
78 struct davinci_psc_regs *psc_regs;
80 psc_regs = davinci_psc0_regs;
81 mdstat = &psc_regs->psc0.mdstat[id];
82 mdctl = &psc_regs->psc0.mdctl[id];
83 ptstat = &psc_regs->ptstat;
84 ptcmd = &psc_regs->ptcmd;
86 while (*ptstat & (0x1 << domain))
89 if ((*mdstat & 0x1f) == 0x03)
90 return; /* Already on and enabled */
94 *ptcmd = 0x1 << domain;
96 while (*ptstat & (0x1 << domain))
98 while ((*mdstat & 0x1f) != 0x03)
99 ; /* Probably an overkill... */
102 static void dspwake(void)
104 unsigned *resetvect = (unsigned *)DAVINCI_L3CBARAM_BASE;
107 /* if the device is ARM only, return */
108 if ((readl(CHIP_REV_ID_REG) & 0x3f) == 0x10)
111 if (hwconfig_subarg_cmp_f("dsp", "wake", "no", NULL))
114 *resetvect++ = 0x1E000; /* DSP Idle */
115 /* clear out the next 10 words as NOP */
116 memset(resetvect, 0, sizeof(unsigned) *10);
118 /* setup the DSP reset vector */
119 writel(DAVINCI_L3CBARAM_BASE, HOST1CFG);
121 dsp_lpsc_on(1, DAVINCI_LPSC_GEM);
122 val = readl(PSC0_MDCTL + (15 * 4));
124 writel(val, (PSC0_MDCTL + (15 * 4)));
127 int misc_init_r(void)
131 #if defined(CONFIG_MAC_ADDR_IN_SPIFLASH) || defined(CONFIG_MAC_ADDR_IN_EEPROM)
133 uchar env_enetaddr[6];
136 enetaddr_found = eth_env_get_enetaddr("ethaddr", env_enetaddr);
140 #ifdef CONFIG_MAC_ADDR_IN_SPIFLASH
144 spi_mac_read = get_mac_addr(buff);
148 * MAC address not present in the environment
149 * try and read the MAC address from SPI flash
152 if (!enetaddr_found) {
154 if (is_valid_ethaddr(buff)) {
155 if (eth_env_set_enetaddr("ethaddr", buff)) {
156 printf("Warning: Failed to "
157 "set MAC address from SPI flash\n");
160 printf("Warning: Invalid "
161 "MAC address read from SPI flash\n");
166 * MAC address present in environment compare it with
167 * the MAC address in SPI flash and warn on mismatch
169 if (!spi_mac_read && is_valid_ethaddr(buff) &&
170 memcmp(env_enetaddr, buff, 6))
171 printf("Warning: MAC address in SPI flash don't match "
172 "with the MAC address in the environment\n");
173 printf("Default using MAC address from environment\n");
176 #elif defined(CONFIG_MAC_ADDR_IN_EEPROM)
180 /* Read Ethernet MAC address from EEPROM */
181 eeprom_mac_read = dvevm_read_mac_address(enetaddr);
184 * MAC address not present in the environment
185 * try and read the MAC address from EEPROM flash
188 if (!enetaddr_found) {
190 /* Set Ethernet MAC address from EEPROM */
191 davinci_sync_env_enetaddr(enetaddr);
194 * MAC address present in environment compare it with
195 * the MAC address in EEPROM and warn on mismatch
197 if (eeprom_mac_read && memcmp(enetaddr, env_enetaddr, 6))
198 printf("Warning: MAC address in EEPROM don't match "
199 "with the MAC address in the environment\n");
200 printf("Default using MAC address from environment\n");
207 #ifndef CONFIG_DM_MMC
208 #ifdef CONFIG_MMC_DAVINCI
209 static struct davinci_mmc mmc_sd0 = {
210 .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE,
211 .host_caps = MMC_MODE_4BIT, /* DA850 supports only 4-bit SD/MMC */
212 .voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
213 .version = MMC_CTLR_VERSION_2,
216 int board_mmc_init(bd_t *bis)
218 mmc_sd0.input_clk = clk_get(DAVINCI_MMCSD_CLKID);
220 /* Add slot-0 to mmc subsystem */
221 return davinci_mmc_init(bis, &mmc_sd0);
226 static const struct pinmux_config gpio_pins[] = {
227 #ifdef CONFIG_USE_NOR
228 /* GP0[11] is required for NOR to work on Rev 3 EVMs */
229 { pinmux(0), 8, 4 }, /* GP0[11] */
231 #ifdef CONFIG_MMC_DAVINCI
232 /* GP0[11] is required for SD to work on Rev 3 EVMs */
233 { pinmux(0), 8, 4 }, /* GP0[11] */
237 const struct pinmux_resource pinmuxes[] = {
238 #ifdef CONFIG_DRIVER_TI_EMAC
239 PINMUX_ITEM(emac_pins_mdio),
240 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
241 PINMUX_ITEM(emac_pins_rmii),
243 PINMUX_ITEM(emac_pins_mii),
246 #ifdef CONFIG_SPI_FLASH
247 PINMUX_ITEM(spi1_pins_base),
248 PINMUX_ITEM(spi1_pins_scs0),
250 PINMUX_ITEM(uart2_pins_txrx),
251 PINMUX_ITEM(uart2_pins_rtscts),
252 PINMUX_ITEM(i2c0_pins),
253 #ifdef CONFIG_NAND_DAVINCI
254 PINMUX_ITEM(emifa_pins_cs3),
255 PINMUX_ITEM(emifa_pins_cs4),
256 PINMUX_ITEM(emifa_pins_nand),
257 #elif defined(CONFIG_USE_NOR)
258 PINMUX_ITEM(emifa_pins_cs2),
259 PINMUX_ITEM(emifa_pins_nor),
261 PINMUX_ITEM(gpio_pins),
262 #ifdef CONFIG_MMC_DAVINCI
263 PINMUX_ITEM(mmc0_pins),
267 const int pinmuxes_size = ARRAY_SIZE(pinmuxes);
269 const struct lpsc_resource lpsc[] = {
270 { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
271 { DAVINCI_LPSC_SPI1 }, /* Serial Flash */
272 { DAVINCI_LPSC_EMAC }, /* image download */
273 { DAVINCI_LPSC_UART2 }, /* console */
274 { DAVINCI_LPSC_GPIO },
275 #ifdef CONFIG_MMC_DAVINCI
276 { DAVINCI_LPSC_MMC_SD },
280 const int lpsc_size = ARRAY_SIZE(lpsc);
282 #ifndef CONFIG_DA850_EVM_MAX_CPU_CLK
283 #define CONFIG_DA850_EVM_MAX_CPU_CLK 300000000
286 #define REV_AM18X_EVM 0x100
289 * get_board_rev() - setup to pass kernel board revision information
291 * bit[0-3] Maximum cpu clock rate supported by onboard SoC
297 u32 get_board_rev(void)
300 u32 maxcpuclk = CONFIG_DA850_EVM_MAX_CPU_CLK;
303 s = env_get("maxcpuclk");
305 maxcpuclk = simple_strtoul(s, NULL, 10);
307 if (maxcpuclk >= 456000000)
309 else if (maxcpuclk >= 408000000)
311 else if (maxcpuclk >= 372000000)
313 #ifdef CONFIG_DA850_AM18X_EVM
314 rev |= REV_AM18X_EVM;
319 int board_early_init_f(void)
322 * Power on required peripherals
323 * ARM does not have access by default to PSC0 and PSC1
324 * assuming here that the DSP bootloader has set the IOPU
325 * such that PSC access is available to ARM
327 if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
337 #ifdef CONFIG_NAND_DAVINCI
339 * NAND CS setup - cycle counts based on da850evm NAND timings in the
340 * Linux kernel @ 25MHz EMIFA
342 writel((DAVINCI_ABCR_WSETUP(2) |
343 DAVINCI_ABCR_WSTROBE(2) |
344 DAVINCI_ABCR_WHOLD(1) |
345 DAVINCI_ABCR_RSETUP(1) |
346 DAVINCI_ABCR_RSTROBE(4) |
347 DAVINCI_ABCR_RHOLD(0) |
349 DAVINCI_ABCR_ASIZE_8BIT),
350 &davinci_emif_regs->ab2cr); /* CS3 */
353 /* arch number of the board */
354 gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA850_EVM;
356 /* address of boot parameters */
357 gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
359 /* setup the SUSPSRC for ARM to control emulation suspend */
360 writel(readl(&davinci_syscfg_regs->suspsrc) &
361 ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
362 DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
363 DAVINCI_SYSCFG_SUSPSRC_UART2),
364 &davinci_syscfg_regs->suspsrc);
366 /* configure pinmux settings */
367 if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
370 #ifdef CONFIG_USE_NOR
371 /* Set the GPIO direction as output */
372 clrbits_le32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11));
374 /* Set the output as low */
375 writel(0x01 << 11, GPIO_BANK0_REG_CLR_ADDR);
378 #ifdef CONFIG_MMC_DAVINCI
379 /* Set the GPIO direction as output */
380 clrbits_le32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11));
382 /* Set the output as high */
383 writel(0x01 << 11, GPIO_BANK0_REG_SET_ADDR);
386 #ifdef CONFIG_DRIVER_TI_EMAC
387 davinci_emac_mii_mode_sel(HAS_RMII);
388 #endif /* CONFIG_DRIVER_TI_EMAC */
390 /* enable the console UART */
391 writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
392 DAVINCI_UART_PWREMU_MGMT_UTRST),
393 &davinci_uart2_ctrl_regs->pwremu_mgmt);
398 #ifdef CONFIG_DRIVER_TI_EMAC
400 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
404 * DA850/OMAP-L138 EVM can interface to a daughter card for
405 * additional features. This card has an I2C GPIO Expander TCA6416
406 * to select the required functions like camera, RMII Ethernet,
407 * character LCD, video.
409 * Initialization of the expander involves configuring the
410 * polarity and direction of the ports. P07-P05 are used here.
411 * These ports are connected to a Mux chip which enables only one
412 * functionality at a time.
414 * For RMII phy to respond, the MII MDIO clock has to be disabled
415 * since both the PHY devices have address as zero. The MII MDIO
416 * clock is controlled via GPIO2[6].
418 * This code is valid for Beta version of the hardware
420 int rmii_hw_init(void)
422 const struct pinmux_config gpio_pins[] = {
429 /* PinMux for GPIO */
430 if (davinci_configure_pin_mux(gpio_pins, ARRAY_SIZE(gpio_pins)) != 0)
433 /* I2C Exapnder configuration */
434 /* Set polarity to non-inverted */
437 ret = i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 4, 1, buf, 2);
439 printf("\nExpander @ 0x%02x write FAILED!!!\n",
440 CONFIG_SYS_I2C_EXPANDER_ADDR);
444 /* Configure P07-P05 as outputs */
447 ret = i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 6, 1, buf, 2);
449 printf("\nExpander @ 0x%02x write FAILED!!!\n",
450 CONFIG_SYS_I2C_EXPANDER_ADDR);
453 /* For Ethernet RMII selection
458 if (i2c_read(CONFIG_SYS_I2C_EXPANDER_ADDR, 2, 1, buf, 1)) {
459 printf("\nExpander @ 0x%02x read FAILED!!!\n",
460 CONFIG_SYS_I2C_EXPANDER_ADDR);
464 buf[0] |= (0 << 7) | (1 << 6) | (1 << 5);
465 if (i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 2, 1, buf, 1)) {
466 printf("\nExpander @ 0x%02x write FAILED!!!\n",
467 CONFIG_SYS_I2C_EXPANDER_ADDR);
470 /* Set the output as high */
471 temp = REG(GPIO_BANK2_REG_SET_ADDR);
473 REG(GPIO_BANK2_REG_SET_ADDR) = temp;
475 /* Set the GPIO direction as output */
476 temp = REG(GPIO_BANK2_REG_DIR_ADDR);
477 temp &= ~(0x01 << 6);
478 REG(GPIO_BANK2_REG_DIR_ADDR) = temp;
482 #endif /* CONFIG_DRIVER_TI_EMAC_USE_RMII */
485 * Initializes on-board ethernet controllers.
487 int board_eth_init(bd_t *bis)
489 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
490 /* Select RMII fucntion through the expander */
492 printf("RMII hardware init failed!!!\n");
494 if (!davinci_emac_initialize()) {
495 printf("Error: Ethernet init failed!\n");
501 #endif /* CONFIG_DRIVER_TI_EMAC */