2 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
4 * Based on da830evm.c. Original Copyrights follow:
6 * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
7 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
9 * SPDX-License-Identifier: GPL-2.0+
17 #include <spi_flash.h>
18 #include <asm/arch/hardware.h>
19 #include <asm/ti-common/davinci_nand.h>
20 #include <asm/arch/emac_defs.h>
21 #include <asm/arch/pinmux_defs.h>
23 #include <asm/arch/davinci_misc.h>
24 #include <linux/errno.h>
27 #ifdef CONFIG_MMC_DAVINCI
29 #include <asm/arch/sdmmc_defs.h>
32 DECLARE_GLOBAL_DATA_PTR;
34 #ifdef CONFIG_DRIVER_TI_EMAC
35 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
40 #endif /* CONFIG_DRIVER_TI_EMAC */
42 #define CFG_MAC_ADDR_SPI_BUS 0
43 #define CFG_MAC_ADDR_SPI_CS 0
44 #define CFG_MAC_ADDR_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
45 #define CFG_MAC_ADDR_SPI_MODE SPI_MODE_3
47 #define CFG_MAC_ADDR_OFFSET (flash->size - SZ_64K)
49 #ifdef CONFIG_MAC_ADDR_IN_SPIFLASH
50 static int get_mac_addr(u8 *addr)
52 struct spi_flash *flash;
55 flash = spi_flash_probe(CFG_MAC_ADDR_SPI_BUS, CFG_MAC_ADDR_SPI_CS,
56 CFG_MAC_ADDR_SPI_MAX_HZ, CFG_MAC_ADDR_SPI_MODE);
58 printf("Error - unable to probe SPI flash.\n");
62 ret = spi_flash_read(flash, CFG_MAC_ADDR_OFFSET, 6, addr);
64 printf("Error - unable to read MAC address from SPI flash.\n");
72 void dsp_lpsc_on(unsigned domain, unsigned int id)
74 dv_reg_p mdstat, mdctl, ptstat, ptcmd;
75 struct davinci_psc_regs *psc_regs;
77 psc_regs = davinci_psc0_regs;
78 mdstat = &psc_regs->psc0.mdstat[id];
79 mdctl = &psc_regs->psc0.mdctl[id];
80 ptstat = &psc_regs->ptstat;
81 ptcmd = &psc_regs->ptcmd;
83 while (*ptstat & (0x1 << domain))
86 if ((*mdstat & 0x1f) == 0x03)
87 return; /* Already on and enabled */
91 *ptcmd = 0x1 << domain;
93 while (*ptstat & (0x1 << domain))
95 while ((*mdstat & 0x1f) != 0x03)
96 ; /* Probably an overkill... */
99 static void dspwake(void)
101 unsigned *resetvect = (unsigned *)DAVINCI_L3CBARAM_BASE;
104 /* if the device is ARM only, return */
105 if ((readl(CHIP_REV_ID_REG) & 0x3f) == 0x10)
108 if (hwconfig_subarg_cmp_f("dsp", "wake", "no", NULL))
111 *resetvect++ = 0x1E000; /* DSP Idle */
112 /* clear out the next 10 words as NOP */
113 memset(resetvect, 0, sizeof(unsigned) *10);
115 /* setup the DSP reset vector */
116 writel(DAVINCI_L3CBARAM_BASE, HOST1CFG);
118 dsp_lpsc_on(1, DAVINCI_LPSC_GEM);
119 val = readl(PSC0_MDCTL + (15 * 4));
121 writel(val, (PSC0_MDCTL + (15 * 4)));
124 int misc_init_r(void)
128 #if defined(CONFIG_MAC_ADDR_IN_SPIFLASH) || defined(CONFIG_MAC_ADDR_IN_EEPROM)
130 uchar env_enetaddr[6];
133 enetaddr_found = eth_getenv_enetaddr("ethaddr", env_enetaddr);
135 #ifdef CONFIG_MAC_ADDR_IN_SPIFLASH
139 spi_mac_read = get_mac_addr(buff);
142 * MAC address not present in the environment
143 * try and read the MAC address from SPI flash
146 if (!enetaddr_found) {
148 if (is_valid_ethaddr(buff)) {
149 if (eth_setenv_enetaddr("ethaddr", buff)) {
150 printf("Warning: Failed to "
151 "set MAC address from SPI flash\n");
154 printf("Warning: Invalid "
155 "MAC address read from SPI flash\n");
160 * MAC address present in environment compare it with
161 * the MAC address in SPI flash and warn on mismatch
163 if (!spi_mac_read && is_valid_ethaddr(buff) &&
164 memcmp(env_enetaddr, buff, 6))
165 printf("Warning: MAC address in SPI flash don't match "
166 "with the MAC address in the environment\n");
167 printf("Default using MAC address from environment\n");
173 /* Read Ethernet MAC address from EEPROM */
174 eeprom_mac_read = dvevm_read_mac_address(enetaddr);
177 * MAC address not present in the environment
178 * try and read the MAC address from EEPROM flash
181 if (!enetaddr_found) {
183 /* Set Ethernet MAC address from EEPROM */
184 davinci_sync_env_enetaddr(enetaddr);
187 * MAC address present in environment compare it with
188 * the MAC address in EEPROM and warn on mismatch
190 if (eeprom_mac_read && memcmp(enetaddr, env_enetaddr, 6))
191 printf("Warning: MAC address in EEPROM don't match "
192 "with the MAC address in the environment\n");
193 printf("Default using MAC address from environment\n");
200 #ifdef CONFIG_MMC_DAVINCI
201 static struct davinci_mmc mmc_sd0 = {
202 .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE,
203 .host_caps = MMC_MODE_4BIT, /* DA850 supports only 4-bit SD/MMC */
204 .voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
205 .version = MMC_CTLR_VERSION_2,
208 int board_mmc_init(bd_t *bis)
210 mmc_sd0.input_clk = clk_get(DAVINCI_MMCSD_CLKID);
212 /* Add slot-0 to mmc subsystem */
213 return davinci_mmc_init(bis, &mmc_sd0);
217 static const struct pinmux_config gpio_pins[] = {
218 #ifdef CONFIG_USE_NOR
219 /* GP0[11] is required for NOR to work on Rev 3 EVMs */
220 { pinmux(0), 8, 4 }, /* GP0[11] */
222 #ifdef CONFIG_MMC_DAVINCI
223 /* GP0[11] is required for SD to work on Rev 3 EVMs */
224 { pinmux(0), 8, 4 }, /* GP0[11] */
228 const struct pinmux_resource pinmuxes[] = {
229 #ifdef CONFIG_DRIVER_TI_EMAC
230 PINMUX_ITEM(emac_pins_mdio),
231 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
232 PINMUX_ITEM(emac_pins_rmii),
234 PINMUX_ITEM(emac_pins_mii),
237 #ifdef CONFIG_SPI_FLASH
238 PINMUX_ITEM(spi1_pins_base),
239 PINMUX_ITEM(spi1_pins_scs0),
241 PINMUX_ITEM(uart2_pins_txrx),
242 PINMUX_ITEM(uart2_pins_rtscts),
243 PINMUX_ITEM(i2c0_pins),
244 #ifdef CONFIG_NAND_DAVINCI
245 PINMUX_ITEM(emifa_pins_cs3),
246 PINMUX_ITEM(emifa_pins_cs4),
247 PINMUX_ITEM(emifa_pins_nand),
248 #elif defined(CONFIG_USE_NOR)
249 PINMUX_ITEM(emifa_pins_cs2),
250 PINMUX_ITEM(emifa_pins_nor),
252 PINMUX_ITEM(gpio_pins),
253 #ifdef CONFIG_MMC_DAVINCI
254 PINMUX_ITEM(mmc0_pins),
258 const int pinmuxes_size = ARRAY_SIZE(pinmuxes);
260 const struct lpsc_resource lpsc[] = {
261 { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
262 { DAVINCI_LPSC_SPI1 }, /* Serial Flash */
263 { DAVINCI_LPSC_EMAC }, /* image download */
264 { DAVINCI_LPSC_UART2 }, /* console */
265 { DAVINCI_LPSC_GPIO },
266 #ifdef CONFIG_MMC_DAVINCI
267 { DAVINCI_LPSC_MMC_SD },
271 const int lpsc_size = ARRAY_SIZE(lpsc);
273 #ifndef CONFIG_DA850_EVM_MAX_CPU_CLK
274 #define CONFIG_DA850_EVM_MAX_CPU_CLK 300000000
277 #define REV_AM18X_EVM 0x100
280 * get_board_rev() - setup to pass kernel board revision information
282 * bit[0-3] Maximum cpu clock rate supported by onboard SoC
288 u32 get_board_rev(void)
291 u32 maxcpuclk = CONFIG_DA850_EVM_MAX_CPU_CLK;
294 s = getenv("maxcpuclk");
296 maxcpuclk = simple_strtoul(s, NULL, 10);
298 if (maxcpuclk >= 456000000)
300 else if (maxcpuclk >= 408000000)
302 else if (maxcpuclk >= 372000000)
304 #ifdef CONFIG_DA850_AM18X_EVM
305 rev |= REV_AM18X_EVM;
310 int board_early_init_f(void)
313 * Power on required peripherals
314 * ARM does not have access by default to PSC0 and PSC1
315 * assuming here that the DSP bootloader has set the IOPU
316 * such that PSC access is available to ARM
318 if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
328 #ifdef CONFIG_NAND_DAVINCI
330 * NAND CS setup - cycle counts based on da850evm NAND timings in the
331 * Linux kernel @ 25MHz EMIFA
333 writel((DAVINCI_ABCR_WSETUP(2) |
334 DAVINCI_ABCR_WSTROBE(2) |
335 DAVINCI_ABCR_WHOLD(1) |
336 DAVINCI_ABCR_RSETUP(1) |
337 DAVINCI_ABCR_RSTROBE(4) |
338 DAVINCI_ABCR_RHOLD(0) |
340 DAVINCI_ABCR_ASIZE_8BIT),
341 &davinci_emif_regs->ab2cr); /* CS3 */
344 /* arch number of the board */
345 gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA850_EVM;
347 /* address of boot parameters */
348 gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
350 /* setup the SUSPSRC for ARM to control emulation suspend */
351 writel(readl(&davinci_syscfg_regs->suspsrc) &
352 ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
353 DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
354 DAVINCI_SYSCFG_SUSPSRC_UART2),
355 &davinci_syscfg_regs->suspsrc);
357 /* configure pinmux settings */
358 if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
361 #ifdef CONFIG_USE_NOR
362 /* Set the GPIO direction as output */
363 clrbits_le32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11));
365 /* Set the output as low */
366 writel(0x01 << 11, GPIO_BANK0_REG_CLR_ADDR);
369 #ifdef CONFIG_MMC_DAVINCI
370 /* Set the GPIO direction as output */
371 clrbits_le32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11));
373 /* Set the output as high */
374 writel(0x01 << 11, GPIO_BANK0_REG_SET_ADDR);
377 #ifdef CONFIG_DRIVER_TI_EMAC
378 davinci_emac_mii_mode_sel(HAS_RMII);
379 #endif /* CONFIG_DRIVER_TI_EMAC */
381 /* enable the console UART */
382 writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
383 DAVINCI_UART_PWREMU_MGMT_UTRST),
384 &davinci_uart2_ctrl_regs->pwremu_mgmt);
389 #ifdef CONFIG_DRIVER_TI_EMAC
391 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
395 * DA850/OMAP-L138 EVM can interface to a daughter card for
396 * additional features. This card has an I2C GPIO Expander TCA6416
397 * to select the required functions like camera, RMII Ethernet,
398 * character LCD, video.
400 * Initialization of the expander involves configuring the
401 * polarity and direction of the ports. P07-P05 are used here.
402 * These ports are connected to a Mux chip which enables only one
403 * functionality at a time.
405 * For RMII phy to respond, the MII MDIO clock has to be disabled
406 * since both the PHY devices have address as zero. The MII MDIO
407 * clock is controlled via GPIO2[6].
409 * This code is valid for Beta version of the hardware
411 int rmii_hw_init(void)
413 const struct pinmux_config gpio_pins[] = {
420 /* PinMux for GPIO */
421 if (davinci_configure_pin_mux(gpio_pins, ARRAY_SIZE(gpio_pins)) != 0)
424 /* I2C Exapnder configuration */
425 /* Set polarity to non-inverted */
428 ret = i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 4, 1, buf, 2);
430 printf("\nExpander @ 0x%02x write FAILED!!!\n",
431 CONFIG_SYS_I2C_EXPANDER_ADDR);
435 /* Configure P07-P05 as outputs */
438 ret = i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 6, 1, buf, 2);
440 printf("\nExpander @ 0x%02x write FAILED!!!\n",
441 CONFIG_SYS_I2C_EXPANDER_ADDR);
444 /* For Ethernet RMII selection
449 if (i2c_read(CONFIG_SYS_I2C_EXPANDER_ADDR, 2, 1, buf, 1)) {
450 printf("\nExpander @ 0x%02x read FAILED!!!\n",
451 CONFIG_SYS_I2C_EXPANDER_ADDR);
455 buf[0] |= (0 << 7) | (1 << 6) | (1 << 5);
456 if (i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 2, 1, buf, 1)) {
457 printf("\nExpander @ 0x%02x write FAILED!!!\n",
458 CONFIG_SYS_I2C_EXPANDER_ADDR);
461 /* Set the output as high */
462 temp = REG(GPIO_BANK2_REG_SET_ADDR);
464 REG(GPIO_BANK2_REG_SET_ADDR) = temp;
466 /* Set the GPIO direction as output */
467 temp = REG(GPIO_BANK2_REG_DIR_ADDR);
468 temp &= ~(0x01 << 6);
469 REG(GPIO_BANK2_REG_DIR_ADDR) = temp;
473 #endif /* CONFIG_DRIVER_TI_EMAC_USE_RMII */
476 * Initializes on-board ethernet controllers.
478 int board_eth_init(bd_t *bis)
480 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
481 /* Select RMII fucntion through the expander */
483 printf("RMII hardware init failed!!!\n");
485 if (!davinci_emac_initialize()) {
486 printf("Error: Ethernet init failed!\n");
492 #endif /* CONFIG_DRIVER_TI_EMAC */