1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
5 * Based on da830evm.c. Original Copyrights follow:
7 * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
8 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
13 #include <environment.h>
17 #include <spi_flash.h>
18 #include <asm/arch/hardware.h>
19 #include <asm/ti-common/davinci_nand.h>
20 #include <asm/arch/emac_defs.h>
21 #include <asm/arch/pinmux_defs.h>
23 #include <asm/arch/davinci_misc.h>
24 #include <linux/errno.h>
26 #include <asm/mach-types.h>
29 #ifdef CONFIG_MMC_DAVINCI
31 #include <asm/arch/sdmmc_defs.h>
34 DECLARE_GLOBAL_DATA_PTR;
36 #ifdef CONFIG_DRIVER_TI_EMAC
37 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
42 #endif /* CONFIG_DRIVER_TI_EMAC */
44 #define CFG_MAC_ADDR_SPI_BUS 0
45 #define CFG_MAC_ADDR_SPI_CS 0
46 #define CFG_MAC_ADDR_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
47 #define CFG_MAC_ADDR_SPI_MODE SPI_MODE_3
49 #define CFG_MAC_ADDR_OFFSET (flash->size - SZ_64K)
51 #ifdef CONFIG_MAC_ADDR_IN_SPIFLASH
52 static int get_mac_addr(u8 *addr)
54 struct spi_flash *flash;
57 flash = spi_flash_probe(CFG_MAC_ADDR_SPI_BUS, CFG_MAC_ADDR_SPI_CS,
58 CFG_MAC_ADDR_SPI_MAX_HZ, CFG_MAC_ADDR_SPI_MODE);
60 printf("Error - unable to probe SPI flash.\n");
64 ret = spi_flash_read(flash, (CFG_MAC_ADDR_OFFSET), 6, addr);
66 printf("Error - unable to read MAC address from SPI flash.\n");
74 void dsp_lpsc_on(unsigned domain, unsigned int id)
76 dv_reg_p mdstat, mdctl, ptstat, ptcmd;
77 struct davinci_psc_regs *psc_regs;
79 psc_regs = davinci_psc0_regs;
80 mdstat = &psc_regs->psc0.mdstat[id];
81 mdctl = &psc_regs->psc0.mdctl[id];
82 ptstat = &psc_regs->ptstat;
83 ptcmd = &psc_regs->ptcmd;
85 while (*ptstat & (0x1 << domain))
88 if ((*mdstat & 0x1f) == 0x03)
89 return; /* Already on and enabled */
93 *ptcmd = 0x1 << domain;
95 while (*ptstat & (0x1 << domain))
97 while ((*mdstat & 0x1f) != 0x03)
98 ; /* Probably an overkill... */
101 static void dspwake(void)
103 unsigned *resetvect = (unsigned *)DAVINCI_L3CBARAM_BASE;
106 /* if the device is ARM only, return */
107 if ((readl(CHIP_REV_ID_REG) & 0x3f) == 0x10)
110 if (hwconfig_subarg_cmp_f("dsp", "wake", "no", NULL))
113 *resetvect++ = 0x1E000; /* DSP Idle */
114 /* clear out the next 10 words as NOP */
115 memset(resetvect, 0, sizeof(unsigned) *10);
117 /* setup the DSP reset vector */
118 writel(DAVINCI_L3CBARAM_BASE, HOST1CFG);
120 dsp_lpsc_on(1, DAVINCI_LPSC_GEM);
121 val = readl(PSC0_MDCTL + (15 * 4));
123 writel(val, (PSC0_MDCTL + (15 * 4)));
126 int misc_init_r(void)
130 #if defined(CONFIG_MAC_ADDR_IN_SPIFLASH) || defined(CONFIG_MAC_ADDR_IN_EEPROM)
132 uchar env_enetaddr[6];
135 enetaddr_found = eth_env_get_enetaddr("ethaddr", env_enetaddr);
139 #ifdef CONFIG_MAC_ADDR_IN_SPIFLASH
143 spi_mac_read = get_mac_addr(buff);
147 * MAC address not present in the environment
148 * try and read the MAC address from SPI flash
151 if (!enetaddr_found) {
153 if (is_valid_ethaddr(buff)) {
154 if (eth_env_set_enetaddr("ethaddr", buff)) {
155 printf("Warning: Failed to "
156 "set MAC address from SPI flash\n");
159 printf("Warning: Invalid "
160 "MAC address read from SPI flash\n");
165 * MAC address present in environment compare it with
166 * the MAC address in SPI flash and warn on mismatch
168 if (!spi_mac_read && is_valid_ethaddr(buff) &&
169 memcmp(env_enetaddr, buff, 6))
170 printf("Warning: MAC address in SPI flash don't match "
171 "with the MAC address in the environment\n");
172 printf("Default using MAC address from environment\n");
175 #elif defined(CONFIG_MAC_ADDR_IN_EEPROM)
179 /* Read Ethernet MAC address from EEPROM */
180 eeprom_mac_read = dvevm_read_mac_address(enetaddr);
183 * MAC address not present in the environment
184 * try and read the MAC address from EEPROM flash
187 if (!enetaddr_found) {
189 /* Set Ethernet MAC address from EEPROM */
190 davinci_sync_env_enetaddr(enetaddr);
193 * MAC address present in environment compare it with
194 * the MAC address in EEPROM and warn on mismatch
196 if (eeprom_mac_read && memcmp(enetaddr, env_enetaddr, 6))
197 printf("Warning: MAC address in EEPROM don't match "
198 "with the MAC address in the environment\n");
199 printf("Default using MAC address from environment\n");
206 static const struct pinmux_config gpio_pins[] = {
207 #ifdef CONFIG_USE_NOR
208 /* GP0[11] is required for NOR to work on Rev 3 EVMs */
209 { pinmux(0), 8, 4 }, /* GP0[11] */
211 #ifdef CONFIG_MMC_DAVINCI
212 /* GP0[11] is required for SD to work on Rev 3 EVMs */
213 { pinmux(0), 8, 4 }, /* GP0[11] */
217 const struct pinmux_resource pinmuxes[] = {
218 #ifndef CONFIG_SPL_BUILD
219 #ifdef CONFIG_DRIVER_TI_EMAC
220 PINMUX_ITEM(emac_pins_mdio),
221 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
222 PINMUX_ITEM(emac_pins_rmii),
224 PINMUX_ITEM(emac_pins_mii),
225 #endif /* CONFIG_DRIVER_TI_EMAC */
226 #endif /* CONFIG_DRIVER_TI_EMAC_USE_RMII */
227 #endif /* CONFIG_SPL_BUILD */
228 #ifdef CONFIG_SPI_FLASH
229 #if !CONFIG_IS_ENABLED(PINCTRL)
230 PINMUX_ITEM(spi1_pins_base),
231 PINMUX_ITEM(spi1_pins_scs0),
234 #if !CONFIG_IS_ENABLED(PINCTRL)
235 PINMUX_ITEM(uart2_pins_txrx),
236 PINMUX_ITEM(uart2_pins_rtscts),
238 #if !CONFIG_IS_ENABLED(PINCTRL)
239 PINMUX_ITEM(i2c0_pins),
241 #ifdef CONFIG_NAND_DAVINCI
242 PINMUX_ITEM(emifa_pins_cs3),
243 PINMUX_ITEM(emifa_pins_cs4),
244 PINMUX_ITEM(emifa_pins_nand),
245 #elif defined(CONFIG_USE_NOR)
246 PINMUX_ITEM(emifa_pins_cs2),
247 PINMUX_ITEM(emifa_pins_nor),
249 PINMUX_ITEM(gpio_pins),
250 #ifdef CONFIG_MMC_DAVINCI
251 #if !CONFIG_IS_ENABLED(PINCTRL)
252 PINMUX_ITEM(mmc0_pins),
257 const int pinmuxes_size = ARRAY_SIZE(pinmuxes);
259 const struct lpsc_resource lpsc[] = {
260 { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
261 { DAVINCI_LPSC_SPI1 }, /* Serial Flash */
262 { DAVINCI_LPSC_EMAC }, /* image download */
263 { DAVINCI_LPSC_UART2 }, /* console */
264 { DAVINCI_LPSC_GPIO },
265 #ifdef CONFIG_MMC_DAVINCI
266 { DAVINCI_LPSC_MMC_SD },
270 const int lpsc_size = ARRAY_SIZE(lpsc);
272 #ifndef CONFIG_DA850_EVM_MAX_CPU_CLK
273 #define CONFIG_DA850_EVM_MAX_CPU_CLK 300000000
276 #define REV_AM18X_EVM 0x100
279 * get_board_rev() - setup to pass kernel board revision information
281 * bit[0-3] Maximum cpu clock rate supported by onboard SoC
287 u32 get_board_rev(void)
290 u32 maxcpuclk = CONFIG_DA850_EVM_MAX_CPU_CLK;
293 s = env_get("maxcpuclk");
295 maxcpuclk = simple_strtoul(s, NULL, 10);
297 if (maxcpuclk >= 456000000)
299 else if (maxcpuclk >= 408000000)
301 else if (maxcpuclk >= 372000000)
303 #ifdef CONFIG_DA850_AM18X_EVM
304 rev |= REV_AM18X_EVM;
309 int board_early_init_f(void)
312 * Power on required peripherals
313 * ARM does not have access by default to PSC0 and PSC1
314 * assuming here that the DSP bootloader has set the IOPU
315 * such that PSC access is available to ARM
317 if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
327 #ifdef CONFIG_NAND_DAVINCI
329 * NAND CS setup - cycle counts based on da850evm NAND timings in the
330 * Linux kernel @ 25MHz EMIFA
332 writel((DAVINCI_ABCR_WSETUP(2) |
333 DAVINCI_ABCR_WSTROBE(2) |
334 DAVINCI_ABCR_WHOLD(1) |
335 DAVINCI_ABCR_RSETUP(1) |
336 DAVINCI_ABCR_RSTROBE(4) |
337 DAVINCI_ABCR_RHOLD(0) |
339 DAVINCI_ABCR_ASIZE_8BIT),
340 &davinci_emif_regs->ab2cr); /* CS3 */
343 /* arch number of the board */
344 gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA850_EVM;
346 /* address of boot parameters */
347 gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
349 /* setup the SUSPSRC for ARM to control emulation suspend */
350 writel(readl(&davinci_syscfg_regs->suspsrc) &
351 ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
352 DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
353 DAVINCI_SYSCFG_SUSPSRC_UART2),
354 &davinci_syscfg_regs->suspsrc);
356 #ifdef CONFIG_USE_NOR
357 /* Set the GPIO direction as output */
358 clrbits_le32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11));
360 /* Set the output as low */
361 writel(0x01 << 11, GPIO_BANK0_REG_CLR_ADDR);
364 #ifdef CONFIG_MMC_DAVINCI
365 /* Set the GPIO direction as output */
366 clrbits_le32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11));
368 /* Set the output as high */
369 writel(0x01 << 11, GPIO_BANK0_REG_SET_ADDR);
372 #ifdef CONFIG_DRIVER_TI_EMAC
373 davinci_emac_mii_mode_sel(HAS_RMII);
374 #endif /* CONFIG_DRIVER_TI_EMAC */
379 #ifdef CONFIG_DRIVER_TI_EMAC
381 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
385 * DA850/OMAP-L138 EVM can interface to a daughter card for
386 * additional features. This card has an I2C GPIO Expander TCA6416
387 * to select the required functions like camera, RMII Ethernet,
388 * character LCD, video.
390 * Initialization of the expander involves configuring the
391 * polarity and direction of the ports. P07-P05 are used here.
392 * These ports are connected to a Mux chip which enables only one
393 * functionality at a time.
395 * For RMII phy to respond, the MII MDIO clock has to be disabled
396 * since both the PHY devices have address as zero. The MII MDIO
397 * clock is controlled via GPIO2[6].
399 * This code is valid for Beta version of the hardware
401 int rmii_hw_init(void)
403 const struct pinmux_config gpio_pins[] = {
410 /* PinMux for GPIO */
411 if (davinci_configure_pin_mux(gpio_pins, ARRAY_SIZE(gpio_pins)) != 0)
414 /* I2C Exapnder configuration */
415 /* Set polarity to non-inverted */
418 ret = i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 4, 1, buf, 2);
420 printf("\nExpander @ 0x%02x write FAILED!!!\n",
421 CONFIG_SYS_I2C_EXPANDER_ADDR);
425 /* Configure P07-P05 as outputs */
428 ret = i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 6, 1, buf, 2);
430 printf("\nExpander @ 0x%02x write FAILED!!!\n",
431 CONFIG_SYS_I2C_EXPANDER_ADDR);
434 /* For Ethernet RMII selection
439 if (i2c_read(CONFIG_SYS_I2C_EXPANDER_ADDR, 2, 1, buf, 1)) {
440 printf("\nExpander @ 0x%02x read FAILED!!!\n",
441 CONFIG_SYS_I2C_EXPANDER_ADDR);
445 buf[0] |= (0 << 7) | (1 << 6) | (1 << 5);
446 if (i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 2, 1, buf, 1)) {
447 printf("\nExpander @ 0x%02x write FAILED!!!\n",
448 CONFIG_SYS_I2C_EXPANDER_ADDR);
451 /* Set the output as high */
452 temp = REG(GPIO_BANK2_REG_SET_ADDR);
454 REG(GPIO_BANK2_REG_SET_ADDR) = temp;
456 /* Set the GPIO direction as output */
457 temp = REG(GPIO_BANK2_REG_DIR_ADDR);
458 temp &= ~(0x01 << 6);
459 REG(GPIO_BANK2_REG_DIR_ADDR) = temp;
463 #endif /* CONFIG_DRIVER_TI_EMAC_USE_RMII */
466 * Initializes on-board ethernet controllers.
468 int board_eth_init(bd_t *bis)
470 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII
471 /* Select RMII fucntion through the expander */
473 printf("RMII hardware init failed!!!\n");
477 #endif /* CONFIG_DRIVER_TI_EMAC */