2 * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
4 * Base on code from TI. Original Notices follow:
6 * (C) Copyright 2008, Texas Instruments, Inc. http://www.ti.com/
8 * Modified for DA8xx EVM.
10 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
12 * Parts are shamelessly stolen from various TI sources, original copyright
14 * -----------------------------------------------------------------
16 * Copyright (C) 2004 Texas Instruments.
18 * ----------------------------------------------------------------------------
19 * This program is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License as published by
21 * the Free Software Foundation; either version 2 of the License, or
22 * (at your option) any later version.
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
32 * ----------------------------------------------------------------------------
39 #include <asm/arch/hardware.h>
40 #include <asm/arch/emif_defs.h>
41 #include <asm/arch/emac_defs.h>
43 #include <asm/arch/davinci_misc.h>
44 #include <asm/arch/da8xx_common.h>
46 DECLARE_GLOBAL_DATA_PTR;
48 #define pinmux(x) (&davinci_syscfg_regs->pinmux[x])
50 /* SPI0 pin muxer settings */
51 static const struct pinmux_config spi0_pins[] = {
59 /* EMIF-A bus pins for 8-bit NAND support on CS3 */
60 static const struct pinmux_config emifa_nand_pins[] = {
76 /* EMAC PHY interface pins */
77 static const struct pinmux_config emac_pins[] = {
90 /* UART pin muxer settings */
91 static const struct pinmux_config uart_pins[] = {
96 /* I2C pin muxer settings */
97 static const struct pinmux_config i2c_pins[] = {
102 /* USB0_DRVVBUS pin muxer settings */
103 static const struct pinmux_config usb_pins[] = {
107 static const struct pinmux_resource pinmuxes[] = {
108 #ifdef CONFIG_SPI_FLASH
109 PINMUX_ITEM(spi0_pins),
111 PINMUX_ITEM(uart_pins),
112 PINMUX_ITEM(i2c_pins),
113 #ifdef CONFIG_USB_DA8XX
114 PINMUX_ITEM(usb_pins),
116 #ifdef CONFIG_USE_NAND
117 PINMUX_ITEM(emifa_nand_pins),
119 #if defined(CONFIG_DRIVER_TI_EMAC)
120 PINMUX_ITEM(emac_pins),
124 static const struct lpsc_resource lpsc[] = {
125 { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
126 { DAVINCI_LPSC_SPI0 }, /* Serial Flash */
127 { DAVINCI_LPSC_EMAC }, /* image download */
128 { DAVINCI_LPSC_UART2 }, /* console */
129 { DAVINCI_LPSC_GPIO },
134 #ifndef CONFIG_USE_IRQ
138 #ifdef CONFIG_NAND_DAVINCI
139 /* EMIFA 100MHz clock select */
140 writel(readl(&davinci_syscfg_regs->cfgchip3) & ~2,
141 &davinci_syscfg_regs->cfgchip3);
143 writel((DAVINCI_ABCR_WSETUP(0) |
144 DAVINCI_ABCR_WSTROBE(2) |
145 DAVINCI_ABCR_WHOLD(0) |
146 DAVINCI_ABCR_RSETUP(0) |
147 DAVINCI_ABCR_RSTROBE(2) |
148 DAVINCI_ABCR_RHOLD(0) |
150 DAVINCI_ABCR_ASIZE_8BIT),
151 &davinci_emif_regs->ab2cr);
154 /* arch number of the board */
155 gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA830_EVM;
157 /* address of boot parameters */
158 gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
161 * Power on required peripherals
162 * ARM does not have access by default to PSC0 and PSC1
163 * assuming here that the DSP bootloader has set the IOPU
164 * such that PSC access is available to ARM
166 if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
169 /* setup the SUSPSRC for ARM to control emulation suspend */
170 writel(readl(&davinci_syscfg_regs->suspsrc) &
171 ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
172 DAVINCI_SYSCFG_SUSPSRC_SPI0 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
173 DAVINCI_SYSCFG_SUSPSRC_UART2),
174 &davinci_syscfg_regs->suspsrc);
176 /* configure pinmux settings */
177 if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
180 /* enable the console UART */
181 writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
182 DAVINCI_UART_PWREMU_MGMT_UTRST),
183 &davinci_uart2_ctrl_regs->pwremu_mgmt);
188 #if defined(CONFIG_DRIVER_TI_EMAC)
190 #define PHY_SW_I2C_ADDR 0x5f /* Address of PHY on i2c bus */
193 * Initializes on-board ethernet controllers.
195 int board_eth_init(bd_t *bis)
197 u_int8_t mac_addr[6];
198 u_int8_t switch_start_cmd[2] = { 0x01, 0x23 };
199 struct eth_device *dev;
201 /* Read Ethernet MAC address from EEPROM */
202 if (dvevm_read_mac_address(mac_addr))
203 /* set address env if not already set */
204 davinci_sync_env_enetaddr(mac_addr);
206 /* read the address back from env */
207 if (!eth_getenv_enetaddr("ethaddr", mac_addr))
210 /* enable the Ethernet switch in the 3 port PHY */
211 if (i2c_write(PHY_SW_I2C_ADDR, 0, 0,
212 switch_start_cmd, sizeof(switch_start_cmd))) {
213 printf("Ethernet switch start failed!\n");
217 /* finally, initialise the driver */
218 if (!davinci_emac_initialize()) {
219 printf("Error: Ethernet init failed!\n");
225 /* provide the resulting addr to the driver */
226 memcpy(dev->enetaddr, mac_addr, 6);
227 dev->write_hwaddr(dev);
231 #endif /* CONFIG_DRIVER_TI_EMAC */