2 * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
4 * Base on code from TI. Original Notices follow:
6 * (C) Copyright 2008, Texas Instruments, Inc. http://www.ti.com/
8 * Modified for DA8xx EVM.
10 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
12 * Parts are shamelessly stolen from various TI sources, original copyright
14 * -----------------------------------------------------------------
16 * Copyright (C) 2004 Texas Instruments.
18 * ----------------------------------------------------------------------------
19 * This program is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License as published by
21 * the Free Software Foundation; either version 2 of the License, or
22 * (at your option) any later version.
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
32 * ----------------------------------------------------------------------------
39 #include <asm/arch/hardware.h>
40 #include <asm/arch/emif_defs.h>
41 #include <asm/arch/emac_defs.h>
44 #include <asm/arch/nand_defs.h>
45 #include <asm/arch/davinci_misc.h>
47 DECLARE_GLOBAL_DATA_PTR;
49 #define pinmux(x) (&davinci_syscfg_regs->pinmux[x])
51 /* SPI0 pin muxer settings */
52 static const struct pinmux_config spi0_pins[] = {
60 /* EMIF-A bus pins for 8-bit NAND support on CS3 */
61 static const struct pinmux_config emifa_nand_pins[] = {
77 /* EMAC PHY interface pins */
78 static const struct pinmux_config emac_pins[] = {
91 /* UART pin muxer settings */
92 static const struct pinmux_config uart_pins[] = {
97 /* I2C pin muxer settings */
98 static const struct pinmux_config i2c_pins[] = {
103 #ifdef CONFIG_USE_NAND
104 /* NAND pin muxer settings */
105 const struct pinmux_config aemif_pins[] = {
106 { pinmux(13), 1, 6 },
107 { pinmux(13), 1, 7 },
108 { pinmux(14), 1, 0 },
109 { pinmux(14), 1, 1 },
110 { pinmux(14), 1, 2 },
111 { pinmux(14), 1, 3 },
112 { pinmux(14), 1, 4 },
113 { pinmux(14), 1, 5 },
114 { pinmux(14), 1, 6 },
115 { pinmux(14), 1, 7 },
116 { pinmux(15), 1, 0 },
117 { pinmux(15), 1, 1 },
118 { pinmux(15), 1, 2 },
119 { pinmux(15), 1, 3 },
120 { pinmux(15), 1, 4 },
121 { pinmux(15), 1, 5 },
122 { pinmux(15), 1, 6 },
123 { pinmux(15), 1, 7 },
124 { pinmux(16), 1, 0 },
125 { pinmux(16), 1, 1 },
126 { pinmux(16), 1, 2 },
127 { pinmux(16), 1, 3 },
128 { pinmux(16), 1, 4 },
129 { pinmux(16), 1, 5 },
130 { pinmux(16), 1, 6 },
131 { pinmux(16), 1, 7 },
132 { pinmux(17), 1, 0 },
133 { pinmux(17), 1, 1 },
134 { pinmux(17), 1, 2 },
135 { pinmux(17), 1, 3 },
136 { pinmux(17), 1, 4 },
137 { pinmux(17), 1, 5 },
138 { pinmux(17), 1, 6 },
139 { pinmux(17), 1, 7 },
140 { pinmux(18), 1, 0 },
141 { pinmux(18), 1, 1 },
142 { pinmux(18), 1, 2 },
143 { pinmux(18), 1, 3 },
144 { pinmux(18), 1, 4 },
145 { pinmux(18), 1, 5 },
146 { pinmux(18), 1, 6 },
147 { pinmux(18), 1, 7 },
153 /* USB0_DRVVBUS pin muxer settings */
154 static const struct pinmux_config usb_pins[] = {
158 static const struct pinmux_resource pinmuxes[] = {
159 #ifdef CONFIG_SPI_FLASH
160 PINMUX_ITEM(spi0_pins),
162 PINMUX_ITEM(uart_pins),
163 PINMUX_ITEM(i2c_pins),
164 #ifdef CONFIG_USB_DA8XX
165 PINMUX_ITEM(usb_pins),
167 #ifdef CONFIG_USE_NAND
168 PINMUX_ITEM(emifa_nand_pins),
169 PINMUX_ITEM(aemif_pins),
171 #if defined(CONFIG_DRIVER_TI_EMAC)
172 PINMUX_ITEM(emac_pins),
176 static const struct lpsc_resource lpsc[] = {
177 { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
178 { DAVINCI_LPSC_SPI0 }, /* Serial Flash */
179 { DAVINCI_LPSC_EMAC }, /* image download */
180 { DAVINCI_LPSC_UART2 }, /* console */
181 { DAVINCI_LPSC_GPIO },
186 #ifndef CONFIG_USE_IRQ
190 #ifdef CONFIG_NAND_DAVINCI
191 /* EMIFA 100MHz clock select */
192 writel(readl(&davinci_syscfg_regs->cfgchip3) & ~2,
193 &davinci_syscfg_regs->cfgchip3);
195 writel((DAVINCI_ABCR_WSETUP(0) |
196 DAVINCI_ABCR_WSTROBE(2) |
197 DAVINCI_ABCR_WHOLD(0) |
198 DAVINCI_ABCR_RSETUP(0) |
199 DAVINCI_ABCR_RSTROBE(2) |
200 DAVINCI_ABCR_RHOLD(0) |
202 DAVINCI_ABCR_ASIZE_8BIT),
203 &davinci_emif_regs->ab2cr);
206 /* arch number of the board */
207 gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA830_EVM;
209 /* address of boot parameters */
210 gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
213 * Power on required peripherals
214 * ARM does not have access by default to PSC0 and PSC1
215 * assuming here that the DSP bootloader has set the IOPU
216 * such that PSC access is available to ARM
218 if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
221 /* setup the SUSPSRC for ARM to control emulation suspend */
222 writel(readl(&davinci_syscfg_regs->suspsrc) &
223 ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
224 DAVINCI_SYSCFG_SUSPSRC_SPI0 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
225 DAVINCI_SYSCFG_SUSPSRC_UART2),
226 &davinci_syscfg_regs->suspsrc);
228 /* configure pinmux settings */
229 if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
232 /* enable the console UART */
233 writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
234 DAVINCI_UART_PWREMU_MGMT_UTRST),
235 &davinci_uart2_ctrl_regs->pwremu_mgmt);
241 #ifdef CONFIG_NAND_DAVINCI
242 int board_nand_init(struct nand_chip *nand)
244 davinci_nand_init(nand);
250 #if defined(CONFIG_DRIVER_TI_EMAC)
252 #define PHY_SW_I2C_ADDR 0x5f /* Address of PHY on i2c bus */
255 * Initializes on-board ethernet controllers.
257 int board_eth_init(bd_t *bis)
259 u_int8_t mac_addr[6];
260 u_int8_t switch_start_cmd[2] = { 0x01, 0x23 };
261 struct eth_device *dev;
263 /* Read Ethernet MAC address from EEPROM */
264 if (dvevm_read_mac_address(mac_addr))
265 /* set address env if not already set */
266 davinci_sync_env_enetaddr(mac_addr);
268 /* read the address back from env */
269 if (!eth_getenv_enetaddr("ethaddr", mac_addr))
272 /* enable the Ethernet switch in the 3 port PHY */
273 if (i2c_write(PHY_SW_I2C_ADDR, 0, 0,
274 switch_start_cmd, sizeof(switch_start_cmd))) {
275 printf("Ethernet switch start failed!\n");
279 /* finally, initialise the driver */
280 if (!davinci_emac_initialize()) {
281 printf("Error: Ethernet init failed!\n");
287 /* provide the resulting addr to the driver */
288 memcpy(dev->enetaddr, mac_addr, 6);
289 dev->write_hwaddr(dev);
293 #endif /* CONFIG_DRIVER_TI_EMAC */