4 * http://www.dave-tech.it
5 * http://www.wawnet.biz
6 * mailto:info@wawnet.biz
8 * See file CREDITS for list of people who contributed to this
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 #include <asm/processor.h>
32 /* ------------------------------------------------------------------------- */
35 int gunzip(void *, int, unsigned char *, unsigned long *);
37 int board_early_init_f (void)
39 out32(GPIO0_OR, CFG_NAND0_CE); /* set initial outputs */
40 out32(GPIO0_OR, CFG_NAND1_CE); /* set initial outputs */
43 * IRQ 0-15 405GP internally generated; active high; level sensitive
44 * IRQ 16 405GP internally generated; active low; level sensitive
54 mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
55 mtdcr(uicer, 0x00000000); /* disable all ints */
56 mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/
57 mtdcr(uicpr, 0xFFFFFF80); /* set int polarities */
58 mtdcr(uictr, 0x10000000); /* set int trigger levels */
59 mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/
60 mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
63 * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
66 mtebc (epcr, 0xa8400000); /* ebc always driven */
68 mtebc (epcr, 0x28400000); /* ebc in high-z */
73 /* ------------------------------------------------------------------------- */
75 int misc_init_f (void)
77 return 0; /* dummy implementation */
80 extern flash_info_t flash_info[]; /* info for FLASH chips */
82 int misc_init_r (void)
84 DECLARE_GLOBAL_DATA_PTR;
86 /* adjust flash start and size as well as the offset */
87 gd->bd->bi_flashstart = 0 - flash_info[0].size;
88 gd->bd->bi_flashoffset= flash_info[0].size - CFG_MONITOR_LEN;
90 volatile unsigned short *fpga_mode =
91 (unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL);
92 volatile unsigned char *duart0_mcr =
93 (unsigned char *)((ulong)DUART0_BA + 4);
94 volatile unsigned char *duart1_mcr =
95 (unsigned char *)((ulong)DUART1_BA + 4);
98 char * tmp; /* Temporary char pointer */
100 ulong len = sizeof(fpgadata);
104 unsigned long cntrl0Reg;
106 dst = malloc(CFG_FPGA_MAX_SIZE);
107 if (gunzip (dst, CFG_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
108 printf ("GUNZIP ERROR - must RESET board to recover\n");
109 do_reset (NULL, 0, 0, NULL);
112 status = fpga_boot(dst, len);
114 printf("\nFPGA: Booting failed ");
116 case ERROR_FPGA_PRG_INIT_LOW:
117 printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
119 case ERROR_FPGA_PRG_INIT_HIGH:
120 printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
122 case ERROR_FPGA_PRG_DONE:
123 printf("(Timeout: DONE not high after programming FPGA)\n ");
127 /* display infos on fpgaimage */
129 for (i=0; i<4; i++) {
131 printf("FPGA: %s\n", &(dst[index+1]));
136 for (i=20; i>0; i--) {
137 printf("Rebooting in %2d seconds \r",i);
138 for (index=0;index<1000;index++)
142 do_reset(NULL, 0, 0, NULL);
147 /* display infos on fpgaimage */
149 for (i=0; i<4; i++) {
151 printf("%s ", &(dst[index+1]));
159 * Reset FPGA via FPGA_DATA pin
161 SET_FPGA(FPGA_PRG | FPGA_CLK);
162 udelay(1000); /* wait 1ms */
163 SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);
164 udelay(1000); /* wait 1ms */
169 * Enable power on PS/2 interface
171 *fpga_mode |= CFG_FPGA_CTRL_PS2_RESET;
174 * Enable interrupts in exar duart mcr[3]
183 * Check Board Identity:
186 int checkboard (void)
188 unsigned char str[64];
189 int i = getenv_r ("serial#", str, sizeof(str));
194 puts ("### No HW ID - assuming PPChameleonEVB");
204 /* ------------------------------------------------------------------------- */
206 long int initdram (int board_type)
210 mtdcr(memcfga, mem_mb0cf);
211 val = mfdcr(memcfgd);
213 #if 0 /* test-only */
222 printf("\nmb0cf=%x\n", val); /* test-only */
223 printf("strap=%x\n", mfdcr(strap)); /* test-only */
226 return (4*1024*1024 << ((val & 0x000e0000) >> 17));
229 /* ------------------------------------------------------------------------- */
233 /* TODO: XXX XXX XXX */
234 printf ("test: 16 MB - ok\n");
239 /* ------------------------------------------------------------------------- */
241 #if (CONFIG_COMMANDS & CFG_CMD_NAND)
243 nand_probe(ulong physadr);
251 The HI model is equipped with a large block NAND chip not supported yet
253 (CONFIG_PPCHAMELEON_MODULE_MODEL == CONFIG_PPCHAMELEON_MODULE_HI)
256 #if (CONFIG_PPCHAMELEON_MODULE_MODEL == CONFIG_PPCHAMELEON_MODULE_ME)
257 debug ("Probing at 0x%.8x\n", CFG_NAND0_BASE);
258 totlen += nand_probe (CFG_NAND0_BASE);
259 #endif /* CONFIG_PPCHAMELEON_MODULE_ME, CONFIG_PPCHAMELEON_MODULE_HI */
261 debug ("Probing at 0x%.8x\n", CFG_NAND1_BASE);
262 totlen += nand_probe (CFG_NAND1_BASE);
264 printf ("%4lu MB\n", totlen >>20);
268 #ifdef CONFIG_CFB_CONSOLE
269 # ifdef CONFIG_CONSOLE_EXTRA_INFO
270 # include <video_fb.h>
271 extern GraphicDevice smi;
273 void video_get_info_str (int line_number, char *info)
275 uint pvr = get_pvr ();
277 /* init video info strings for graphic console */
278 switch (line_number) {
282 sprintf (info, " IBM PowerPC 405EP Rev. B");
285 sprintf (info, " IBM PowerPC 405EP Rev. <unknown>");
290 sprintf (info, " DAVE Srl PPChameleonEVB - www.dave-tech.it");
293 sprintf (info, " %s", smi.modeIdent);
297 /* no more info lines */
301 # endif /* CONFIG_CONSOLE_EXTRA_INFO */
302 #endif /* CONFIG_CFB_CONSOLE */