2 * Pinmux configuration for CompuLab CL-SOM-AM57x board
4 * (C) Copyright 2016 CompuLab, Ltd. http://compulab.co.il/
6 * Author: Dmitry Lifshitz <lifshitz@compulab.co.il>
8 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm/arch/sys_proto.h>
11 #include <asm/arch/mux_dra7xx.h>
14 static const struct pad_conf_entry cl_som_am57x_padconf_console[] = {
15 {UART3_RXD, (FSC | IEN | PDIS | PTU | M0)}, /* UART3_RXD */
16 {UART3_TXD, (FSC | IEN | PDIS | PTU | M0)}, /* UART3_TXD */
20 static const struct pad_conf_entry cl_som_am57x_padconf_pmic[] = {
21 {MCASP1_ACLKR, (IEN | PEN | M10)}, /* MCASP1_ACLKR.I2C4_SDA */
22 {MCASP1_FSR, (IEN | PEN | M10)}, /* MCASP1_FSR.I2C4_SCL */
26 static const struct pad_conf_entry cl_som_am57x_padconf_green_led[] = {
27 {GPMC_A15, (IDIS | PDIS | PTD | M14)}, /* GPMC_A15.GPIO2_5 */
31 static const struct pad_conf_entry cl_som_am57x_padconf_sd_card[] = {
32 {MMC1_CLK, (IEN | PDIS | PTU | M0) }, /* MMC1_CLK */
33 {MMC1_CMD, (IEN | PDIS | PTU | M0) }, /* MMC1_CMD */
34 {MMC1_DAT0, (IEN | PDIS | PTU | M0) }, /* MMC1_DAT0 */
35 {MMC1_DAT1, (IEN | PDIS | PTU | M0) }, /* MMC1_DAT1 */
36 {MMC1_DAT2, (IEN | PDIS | PTU | M0) }, /* MMC1_DAT2 */
37 {MMC1_DAT3, (IEN | PDIS | PTU | M0) }, /* MMC1_DAT3 */
38 {MMC1_SDCD, (IEN | PEN | M14)}, /* MMC1_SDCD */
39 {MMC1_SDWP, (IEN | PEN | M14)}, /* MMC1_SDWP */
42 /* WiFi - must be in the safe mode on boot */
43 static const struct pad_conf_entry cl_som_am57x_padconf_wifi[] = {
44 {UART1_CTSN, (IEN | M15)}, /* UART1_CTSN */
45 {UART1_RTSN, (IEN | M15)}, /* UART1_RTSN */
46 {UART2_RXD, (IEN | M15)}, /* UART2_RXD */
47 {UART2_TXD, (IEN | M15)}, /* UART2_TXD */
48 {UART2_CTSN, (IEN | M15)}, /* UART2_CTSN */
49 {UART2_RTSN, (IEN | M15)}, /* UART2_RTSN */
53 static const struct pad_conf_entry cl_som_am57x_padconf_qspi[] = {
54 {GPMC_A13, (IEN | PEN | M1)}, /* GPMC_A13.QSPI1_RTCLK */
55 {GPMC_A18, (IEN | PEN | M1)}, /* GPMC_A18.QSPI1_SCLK */
56 {GPMC_A16, (IEN | PEN | M1)}, /* GPMC_A16.QSPI1_D0 */
57 {GPMC_A17, (IEN | PEN | M1)}, /* GPMC_A17.QSPI1_D1 */
58 {GPMC_CS2, (IEN | PDIS | PTU | M1)}, /* GPMC_CS2.QSPI1_CS0 */
61 /* GPIO Expander I2C */
62 static const struct pad_conf_entry cl_som_am57x_padconf_i2c_gpio[] = {
63 {MCASP1_AXR0, (IEN | PEN | M10)}, /* MCASP1_AXR0.I2C5_SDA */
64 {MCASP1_AXR1, (IEN | PEN | M10)}, /* MCASP1_AXR1.I2C5_SCL */
67 /* eMMC internal storage */
68 static const struct pad_conf_entry cl_som_am57x_padconf_emmc[] = {
69 {GPMC_A19, (IEN | PDIS | PTU | M1)}, /* GPMC_A19.MMC2_DAT4 */
70 {GPMC_A20, (IEN | PDIS | PTU | M1)}, /* GPMC_A20.MMC2_DAT5 */
71 {GPMC_A21, (IEN | PDIS | PTU | M1)}, /* GPMC_A21.MMC2_DAT6 */
72 {GPMC_A22, (IEN | PDIS | PTU | M1)}, /* GPMC_A22.MMC2_DAT7 */
73 {GPMC_A23, (IEN | PDIS | PTU | M1)}, /* GPMC_A23.MMC2_CLK */
74 {GPMC_A24, (IEN | PDIS | PTU | M1)}, /* GPMC_A24.MMC2_DAT0 */
75 {GPMC_A25, (IEN | PDIS | PTU | M1)}, /* GPMC_A25.MMC2_DAT1 */
76 {GPMC_A26, (IEN | PDIS | PTU | M1)}, /* GPMC_A26.MMC2_DAT2 */
77 {GPMC_A27, (IEN | PDIS | PTU | M1)}, /* GPMC_A27.MMC2_DAT3 */
78 {GPMC_CS1, (IEN | PDIS | PTU | M1)}, /* GPMC_CS1.MMC2_CMD */
82 static const struct pad_conf_entry cl_som_am57x_padconf_usb[] = {
83 {USB1_DRVVBUS, (M0 | FSC) }, /* USB1_DRVVBUS.USB1_DRVVBUS */
86 #define SET_MUX(mux_array) do_set_mux32((*ctrl)->control_padconf_core_base, \
87 mux_array, ARRAY_SIZE(mux_array))
89 void set_muxconf_regs(void)
91 SET_MUX(cl_som_am57x_padconf_console);
92 SET_MUX(cl_som_am57x_padconf_pmic);
93 SET_MUX(cl_som_am57x_padconf_green_led);
94 SET_MUX(cl_som_am57x_padconf_sd_card);
95 SET_MUX(cl_som_am57x_padconf_wifi);
96 SET_MUX(cl_som_am57x_padconf_qspi);
97 SET_MUX(cl_som_am57x_padconf_i2c_gpio);
98 SET_MUX(cl_som_am57x_padconf_emmc);
99 SET_MUX(cl_som_am57x_padconf_usb);