1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2000-2003
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
10 #define PHYS_FLASH_1 CONFIG_SYS_FLASH_BASE
11 #define FLASH_BANK_SIZE 0x200000
13 flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
15 void flash_print_info (flash_info_t * info)
19 switch (info->flash_id & FLASH_VENDMASK) {
20 case (AMD_MANUFACT & FLASH_VENDMASK):
24 printf ("Unknown Vendor ");
28 switch (info->flash_id & FLASH_TYPEMASK) {
29 case (AMD_ID_PL160CB & FLASH_TYPEMASK):
30 printf ("AM29PL160CB (16Mbit)\n");
33 printf ("Unknown Chip Type\n");
38 printf (" Size: %ld MB in %d Sectors\n",
39 info->size >> 20, info->sector_count);
41 printf (" Sector Start Addresses:");
42 for (i = 0; i < info->sector_count; i++) {
46 printf (" %08lX%s", info->start[i],
47 info->protect[i] ? " (RO)" : " ");
56 unsigned long flash_init (void)
61 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
64 flash_info[i].flash_id =
65 (AMD_MANUFACT & FLASH_VENDMASK) |
66 (AMD_ID_PL160CB & FLASH_TYPEMASK);
67 flash_info[i].size = FLASH_BANK_SIZE;
68 flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
69 memset (flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
71 flashbase = PHYS_FLASH_1;
73 panic ("configured to many flash banks!\n");
75 for (j = 0; j < flash_info[i].sector_count; j++) {
78 flash_info[i].start[j] = flashbase;
80 if ((j >= 1) && (j <= 2)) {
81 /* 2nd and 3rd are 8 KiB */
82 flash_info[i].start[j] =
83 flashbase + 0x4000 + 0x2000 * (j - 1);
87 flash_info[i].start[j] = flashbase + 0x8000;
89 if ((j >= 4) && (j <= 10)) {
91 flash_info[i].start[j] =
92 flashbase + 0x40000 + 0x40000 * (j -
96 size += flash_info[i].size;
99 flash_protect (FLAG_PROTECT_SET,
100 CONFIG_SYS_FLASH_BASE,
101 CONFIG_SYS_FLASH_BASE + 0x3ffff, &flash_info[0]);
107 #define CMD_READ_ARRAY 0x00F0
108 #define CMD_UNLOCK1 0x00AA
109 #define CMD_UNLOCK2 0x0055
110 #define CMD_ERASE_SETUP 0x0080
111 #define CMD_ERASE_CONFIRM 0x0030
112 #define CMD_PROGRAM 0x00A0
113 #define CMD_UNLOCK_BYPASS 0x0020
115 #define MEM_FLASH_ADDR1 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x00000555<<1)))
116 #define MEM_FLASH_ADDR2 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x000002AA<<1)))
118 #define BIT_ERASE_DONE 0x0080
119 #define BIT_RDY_MASK 0x0080
120 #define BIT_PROGRAM_ERROR 0x0020
121 #define BIT_TIMEOUT 0x80000000 /* our flag */
128 int flash_erase (flash_info_t * info, int s_first, int s_last)
131 int iflag, cflag, prot, sect;
136 /* first look for protection bits */
138 if (info->flash_id == FLASH_UNKNOWN)
139 return ERR_UNKNOWN_FLASH_TYPE;
141 if ((s_first < 0) || (s_first > s_last)) {
145 if ((info->flash_id & FLASH_VENDMASK) !=
146 (AMD_MANUFACT & FLASH_VENDMASK)) {
147 return ERR_UNKNOWN_FLASH_VENDOR;
151 for (sect = s_first; sect <= s_last; ++sect) {
152 if (info->protect[sect]) {
157 return ERR_PROTECTED;
160 * Disable interrupts which might cause a timeout
161 * here. Remember that our exception vectors are
162 * at address 0 in the flash, and we don't want a
163 * (ticker) exception to happen while the flash
164 * chip is in programming mode.
167 cflag = icache_status ();
169 iflag = disable_interrupts ();
173 /* Start erase on unprotected sectors */
174 for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
175 printf ("Erasing sector %2d ... ", sect);
177 /* arm simple, non interrupt dependent timer */
178 start = get_timer(0);
180 if (info->protect[sect] == 0) { /* not protected */
182 (volatile u16 *) (info->start[sect]);
184 MEM_FLASH_ADDR1 = CMD_UNLOCK1;
185 MEM_FLASH_ADDR2 = CMD_UNLOCK2;
186 MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
188 MEM_FLASH_ADDR1 = CMD_UNLOCK1;
189 MEM_FLASH_ADDR2 = CMD_UNLOCK2;
190 *addr = CMD_ERASE_CONFIRM;
192 /* wait until flash is ready */
199 if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
200 MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
206 && (result & 0xFFFF) & BIT_ERASE_DONE)
211 MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
223 } else { /* it was protected */
225 printf ("protected!\n");
230 printf ("User Interrupt!\n");
233 /* allow flash to settle - wait 10 ms */
237 enable_interrupts ();
245 static int write_word (flash_info_t * info, ulong dest, ulong data)
247 volatile u16 *addr = (volatile u16 *) dest;
255 * Check if Flash is (sufficiently) erased
258 if ((result & data) != data)
259 return ERR_NOT_ERASED;
263 * Disable interrupts which might cause a timeout
264 * here. Remember that our exception vectors are
265 * at address 0 in the flash, and we don't want a
266 * (ticker) exception to happen while the flash
267 * chip is in programming mode.
270 cflag = icache_status ();
272 iflag = disable_interrupts ();
274 MEM_FLASH_ADDR1 = CMD_UNLOCK1;
275 MEM_FLASH_ADDR2 = CMD_UNLOCK2;
276 MEM_FLASH_ADDR1 = CMD_PROGRAM;
279 /* arm simple, non interrupt dependent timer */
280 start = get_timer(0);
282 /* wait until flash is ready */
288 if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
292 if (!chip1 && ((result & 0x80) == (data & 0x80)))
297 *addr = CMD_READ_ARRAY;
299 if (chip1 == ERR || *addr != data)
303 enable_interrupts ();
312 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
318 printf ("unaligned destination not supported\n");
324 printf ("odd transfer sizes not supported\n");
332 data = (*((volatile u8 *) addr) << 8) | *((volatile u8 *)
334 if ((rc = write_word (info, wp - 1, data)) != 0) {
343 data = *((volatile u16 *) src);
344 if ((rc = write_word (info, wp, data)) != 0) {
353 data = (*((volatile u8 *) src) << 8) |
354 *((volatile u8 *) (wp + 1));
355 if ((rc = write_word (info, wp, data)) != 0) {