2 * (C) Copyright 2003-2007
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
8 * (C) Copyright 2004-2005
9 * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
11 * Adapted to U-Boot 1.2 by:
12 * Bartlomiej Sieka <tur@semihalf.com>:
13 * - HW ID readout from EEPROM
15 * Grzegorz Bernacki <gjb@semihalf.com>:
16 * - run-time SDRAM controller configuration
19 * See file CREDITS for list of people who contributed to this
22 * This program is free software; you can redistribute it and/or
23 * modify it under the terms of the GNU General Public License as
24 * published by the Free Software Foundation; either version 2 of
25 * the License, or (at your option) any later version.
27 * This program is distributed in the hope that it will be useful,
28 * but WITHOUT ANY WARRANTY; without even the implied warranty of
29 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
30 * GNU General Public License for more details.
32 * You should have received a copy of the GNU General Public License
33 * along with this program; if not, write to the Free Software
34 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
41 #include <asm/processor.h>
43 #include <linux/ctype.h>
45 #ifdef CONFIG_OF_LIBFDT
47 #include <libfdt_env.h>
48 #include <fdt_support.h>
49 #endif /* CONFIG_OF_LIBFDT */
55 DECLARE_GLOBAL_DATA_PTR;
62 * Helper function to initialize SDRAM controller.
64 static void sdram_start(int hi_addr, mem_conf_t *mem_conf)
66 long hi_addr_bit = hi_addr ? 0x01000000 : 0;
68 /* unlock mode register */
69 *(vu_long *)MPC5XXX_SDRAM_CTRL = mem_conf->control | 0x80000000 |
72 /* precharge all banks */
73 *(vu_long *)MPC5XXX_SDRAM_CTRL = mem_conf->control | 0x80000002 |
77 *(vu_long *)MPC5XXX_SDRAM_CTRL = mem_conf->control | 0x80000004 |
80 /* auto refresh, second time */
81 *(vu_long *)MPC5XXX_SDRAM_CTRL = mem_conf->control | 0x80000004 |
84 /* set mode register */
85 *(vu_long *)MPC5XXX_SDRAM_MODE = mem_conf->mode;
87 /* normal operation */
88 *(vu_long *)MPC5XXX_SDRAM_CTRL = mem_conf->control | hi_addr_bit;
90 #endif /* CFG_RAMBOOT */
94 * Retrieve memory configuration for a given module. board_type is the index
95 * in hw_id_list[] corresponding to the module we are executing on; we return
96 * SDRAM controller settings approprate for this module.
98 static mem_conf_t* get_mem_config(int board_type)
102 return memory_config[0];
105 return memory_config[1];
107 printf("ERROR: Unknown module, using a default SDRAM "
108 "configuration - things may not work!!!.\n");
109 return memory_config[0];
115 * Initalize SDRAM - configure SDRAM controller, detect memory size.
117 long int initdram(int board_type)
122 mem_conf_t *mem_conf;
124 mem_conf = get_mem_config(board_type);
126 /* configure SDRAM start/end for detection */
127 *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e; /* 2G at 0x0 */
129 /* setup config registers */
130 *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = mem_conf->config1;
131 *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = mem_conf->config2;
133 sdram_start(0, mem_conf);
134 test1 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
135 sdram_start(1, mem_conf);
136 test2 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
138 sdram_start(0, mem_conf);
143 /* memory smaller than 1MB is impossible */
144 if (dramsize < (1 << 20))
147 /* set SDRAM CS0 size according to the amount of RAM found */
149 *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 +
150 __builtin_ffs(dramsize >> 20) - 1;
152 *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */
153 #else /* CFG_RAMBOOT */
154 /* retrieve size of memory connected to SDRAM CS0 */
155 dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF;
156 if (dramsize >= 0x13)
157 dramsize = (1 << (dramsize - 0x13)) << 20;
160 #endif /* !CFG_RAMBOOT */
163 * On MPC5200B we need to set the special configuration delay in the
164 * DDR controller. Refer to chapter 8.7.5 SDelay--MBAR + 0x0190 of
165 * the MPC5200B User's Manual.
167 *(vu_long *)MPC5XXX_SDRAM_SDELAY = 0x04;
168 __asm__ volatile ("sync");
175 * Read module hardware identification data from the I2C EEPROM.
177 static void read_hw_id(hw_id_t hw_id)
180 for (i = 0; i < HW_ID_ELEM_COUNT; ++i)
181 if (i2c_read(CFG_I2C_EEPROM,
182 hw_id_format[i].offset,
184 (uchar *)&hw_id[i][0],
185 hw_id_format[i].length) != 0)
186 printf("ERROR: can't read HW ID from EEPROM\n");
191 * Identify module we are running on, set gd->board_type to the index in
192 * hw_id_list[] corresponding to the module identifed, or to
193 * CM5200_UNKNOWN_MODULE if we can't identify the module.
195 static void identify_module(hw_id_t hw_id)
199 gd->board_type = CM5200_UNKNOWN_MODULE;
200 for (i = 0; i < sizeof (hw_id_list) / sizeof (char **); ++i) {
202 for (j = 0; j < sizeof (hw_id_identify) / sizeof (int); ++j) {
203 element = hw_id_identify[j];
204 if (strncmp(hw_id_list[i][element],
206 hw_id_format[element].length) != 0) {
220 * Compose string with module name.
221 * buf is assumed to have enough space, and be null-terminated.
223 static void compose_module_name(hw_id_t hw_id, char *buf)
225 char tmp[MODULE_NAME_MAXLEN];
226 strncat(buf, &hw_id[PCB_NAME][0], hw_id_format[PCB_NAME].length);
227 strncat(buf, ".", 1);
228 strncat(buf, &hw_id[FORM][0], hw_id_format[FORM].length);
229 strncat(buf, &hw_id[VERSION][0], hw_id_format[VERSION].length);
230 strncat(buf, " (", 2);
231 strncat(buf, &hw_id[IDENTIFICATION_NUMBER][0],
232 hw_id_format[IDENTIFICATION_NUMBER].length);
233 sprintf(tmp, " / %u.%u)",
234 hw_id[MAJOR_SW_VERSION][0],
235 hw_id[MINOR_SW_VERSION][0]);
241 * Compose string with hostname.
242 * buf is assumed to have enough space, and be null-terminated.
244 static void compose_hostname(hw_id_t hw_id, char *buf)
247 strncat(buf, &hw_id[PCB_NAME][0], hw_id_format[PCB_NAME].length);
248 strncat(buf, "_", 1);
249 strncat(buf, &hw_id[FORM][0], hw_id_format[FORM].length);
250 strncat(buf, &hw_id[VERSION][0], hw_id_format[VERSION].length);
251 for (p = buf; *p; ++p)
257 #if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT)
259 * Update 'model' and 'memory' properties in the blob according to the module
260 * that we are running on.
262 static void ft_blob_update(void *blob, bd_t *bd)
264 int len, ret, nodeoffset = 0;
265 char module_name[MODULE_NAME_MAXLEN] = {0};
266 ulong memory_data[2] = {0};
268 compose_module_name(hw_id, module_name);
269 len = strlen(module_name) + 1;
271 ret = fdt_setprop(blob, nodeoffset, "model", module_name, len);
273 printf("ft_blob_update(): cannot set /model property err:%s\n",
276 memory_data[0] = cpu_to_be32(bd->bi_memstart);
277 memory_data[1] = cpu_to_be32(bd->bi_memsize);
279 nodeoffset = fdt_find_node_by_path (blob, "/memory");
280 if (nodeoffset >= 0) {
281 ret = fdt_setprop(blob, nodeoffset, "reg", memory_data,
282 sizeof(memory_data));
284 printf("ft_blob_update): cannot set /memory/reg "
285 "property err:%s\n", fdt_strerror(ret));
288 /* memory node is required in dts */
289 printf("ft_blob_update(): cannot find /memory node "
290 "err:%s\n", fdt_strerror(nodeoffset));
293 #endif /* defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) */
297 * Read HW ID from I2C EEPROM and detect the modue we are running on. Note
298 * that we need to use local variable for readout, because global data is not
299 * writable yet (and we'll have to redo the readout later on).
304 char module_name_tmp[MODULE_NAME_MAXLEN] = "";
307 * We need I2C to access HW ID data from EEPROM, so we call i2c_init()
308 * here despite the fact that it will be called again later on. We
309 * also use a little trick to silence I2C-related output.
311 gd->flags |= GD_FLG_SILENT;
312 i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
313 gd->flags &= ~GD_FLG_SILENT;
315 read_hw_id(hw_id_tmp);
316 identify_module(hw_id_tmp); /* this sets gd->board_type */
317 compose_module_name(hw_id_tmp, module_name_tmp);
319 if (gd->board_type != CM5200_UNKNOWN_MODULE)
320 printf("Board: %s\n", module_name_tmp);
322 printf("Board: unrecognized cm5200 module (%s)\n",
329 int board_early_init_r(void)
332 * Now, when we are in RAM, enable flash write access for detection
333 * process. Note that CS_BOOT cannot be cleared when executing in
336 *(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
338 /* Now that we can write to global data, read HW ID again. */
345 int post_hotkeys_pressed(void)
349 #endif /* CONFIG_POST */
352 #if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
353 void post_word_store(ulong a)
355 vu_long *save_addr = (vu_long *)(MPC5XXX_SRAM + MPC5XXX_SRAM_POST_SIZE);
360 ulong post_word_load(void)
362 vu_long *save_addr = (vu_long *)(MPC5XXX_SRAM + MPC5XXX_SRAM_POST_SIZE);
365 #endif /* CONFIG_POST || CONFIG_LOGBUFFER */
368 #ifdef CONFIG_MISC_INIT_R
369 int misc_init_r(void)
371 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
374 char hostname[MODULE_NAME_MAXLEN];
376 /* Read ethaddr from EEPROM */
377 if (i2c_read(CFG_I2C_EEPROM, CONFIG_MAC_OFFSET, 2, buf, 6) == 0) {
378 sprintf(str, "%02X:%02X:%02X:%02X:%02X:%02X",
379 buf[0], buf[1], buf[2], buf[3], buf[4], buf[5]);
380 /* Check if MAC addr is owned by Schindler */
381 if (strstr(str, "00:06:C3") != str)
382 printf(LOG_PREFIX "Warning - Illegal MAC address (%s)"
383 " in EEPROM.\n", str);
385 printf(LOG_PREFIX "Using MAC (%s) from I2C EEPROM\n",
387 setenv("ethaddr", str);
390 printf(LOG_PREFIX "Warning - Unable to read MAC from I2C"
391 " device at address %02X:%04X\n", CFG_I2C_EEPROM,
394 #endif /* defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) */
395 if (!getenv("ethaddr"))
396 printf(LOG_PREFIX "MAC address not set, networking is not "
399 /* set the hostname appropriate to the module we're running on */
400 compose_hostname(hw_id, hostname);
401 setenv("hostname", hostname);
405 #endif /* CONFIG_MISC_INIT_R */
408 #ifdef CONFIG_LAST_STAGE_INIT
409 int last_stage_init(void)
411 #ifdef CONFIG_USB_STORAGE
413 #endif /* CONFIG_USB_STORAGE */
416 #endif /* CONFIG_LAST_STAGE_INIT */
419 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
420 void ft_board_setup(void *blob, bd_t *bd)
422 ft_cpu_setup(blob, bd);
423 ft_blob_update(blob, bd);
425 #endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */