board/cm-bf548/cm-bf548.c

   1 /*
   2  * U-boot - main board file
   3  *
   4  * Copyright (c) 2005-2008 Analog Devices Inc.
   5  *
   6  * Licensed under the GPL-2 or later.
   7  */
   8
   9 #include <common.h>
  10 #include <config.h>
  11 #include <command.h>
  12 #include <asm/blackfin.h>
  13
  14 DECLARE_GLOBAL_DATA_PTR;
  15
  16 int checkboard(void)
  17 {
  18         printf("Board: Bluetechnix CM-BF548 board\n");
  19         printf("       Support: http://www.bluetechnix.at/\n");
  20         return 0;
  21 }
  22
  23 phys_size_t initdram(int board_type)
  24 {
  25         gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
  26         gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
  27         return gd->bd->bi_memsize;
  28 }
  29
  30 int board_early_init_f(void)
  31 {
  32         /* Port H: PH8 - PH13 == A4 - A9
  33          * address lines of the parallel asynchronous memory interface
  34          */
  35
  36         /************************************************
  37         * configure GPIO                                *
  38         * set port H function enable register           *
  39         *  configure PH8-PH13 as peripheral (not GPIO)  *
  40         *************************************************/
  41         bfin_write_PORTH_FER(0x3F03);
  42
  43         /************************************************
  44         * set port H MUX to configure PH8-PH13          *
  45         *  1st Function (MUX = 00) (bits 16-27 == 0)    *
  46         *  Set to address signals A4-A9                 *
  47         *************************************************/
  48         bfin_write_PORTH_MUX(0);
  49
  50         /************************************************
  51         * set port H direction register                 *
  52         *  enable PH8-PH13 as outputs                   *
  53         *************************************************/
  54         bfin_write_PORTH_DIR_SET(0x3F00);
  55
  56         /* Port I: PI0 - PH14 == A10 - A24
  57          * address lines of the parallel asynchronous memory interface
  58          */
  59
  60         /************************************************
  61         * set port I function enable register           *
  62         *  configure PI0-PI14 as peripheral (not GPIO)  *
  63         *************************************************/
  64         bfin_write_PORTI_FER(0x7fff);
  65
  66         /**************************************************
  67         * set PORT I MUX to configure PI14-PI0 as         *
  68         * 1st Function (MUX=00) - address signals A10-A24 *
  69         ***************************************************/
  70         bfin_write_PORTI_MUX(0);
  71
  72         /****************************************
  73         * set PORT I direction register         *
  74         *  enable PI0 - PI14 as outputs         *
  75         *****************************************/
  76         bfin_write_PORTI_DIR_SET(0x7fff);
  77
  78         return 0;
  79 }