board/canmb/canmb.c

   1 /*
   2  * (C) Copyright 2005
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * (C) Copyright 2004
   6  * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 #include <common.h>
  12 #include <mpc5xxx.h>
  13 #include <pci.h>
  14
  15 #if defined(CONFIG_MPC5200_DDR)
  16 #include "mt46v16m16-75.h"
  17 #else
  18 #include "mt48lc16m32s2-75.h"
  19 #endif
  20
  21 #ifndef CONFIG_SYS_RAMBOOT
  22 static void sdram_start (int hi_addr)
  23 {
  24         long hi_addr_bit = hi_addr ? 0x01000000 : 0;
  25
  26         /* unlock mode register */
  27         *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000000 | hi_addr_bit;
  28         __asm__ volatile ("sync");
  29
  30         /* precharge all banks */
  31         *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
  32         __asm__ volatile ("sync");
  33
  34 #if SDRAM_DDR
  35         /* set mode register: extended mode */
  36         *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_EMODE;
  37         __asm__ volatile ("sync");
  38
  39         /* set mode register: reset DLL */
  40         *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE | 0x04000000;
  41         __asm__ volatile ("sync");
  42 #endif
  43
  44         /* precharge all banks */
  45         *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
  46         __asm__ volatile ("sync");
  47
  48         /* auto refresh */
  49         *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 | hi_addr_bit;
  50         __asm__ volatile ("sync");
  51
  52         /* set mode register */
  53         *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE;
  54         __asm__ volatile ("sync");
  55
  56         /* normal operation */
  57         *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | hi_addr_bit;
  58         __asm__ volatile ("sync");
  59 }
  60 #endif
  61
  62 /*
  63  * ATTENTION: Although partially referenced initdram does NOT make real use
  64  *            use of CONFIG_SYS_SDRAM_BASE. The code does not work if CONFIG_SYS_SDRAM_BASE
  65  *            is something else than 0x00000000.
  66  */
  67
  68 phys_size_t initdram (int board_type)
  69 {
  70         ulong dramsize = 0;
  71         ulong dramsize2 = 0;
  72 #ifndef CONFIG_SYS_RAMBOOT
  73         ulong test1, test2;
  74
  75         /* setup SDRAM chip selects */
  76         *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e;/* 2G at 0x0 */
  77         *(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x80000000;/* disabled */
  78         __asm__ volatile ("sync");
  79
  80         /* setup config registers */
  81         *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
  82         *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
  83         __asm__ volatile ("sync");
  84
  85 #if SDRAM_DDR
  86         /* set tap delay */
  87         *(vu_long *)MPC5XXX_CDM_PORCFG = SDRAM_TAPDELAY;
  88         __asm__ volatile ("sync");
  89 #endif
  90
  91         /* find RAM size using SDRAM CS0 only */
  92         sdram_start(0);
  93         test1 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000);
  94         sdram_start(1);
  95         test2 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000);
  96         if (test1 > test2) {
  97                 sdram_start(0);
  98                 dramsize = test1;
  99         } else {
 100                 dramsize = test2;
 101         }
 102
 103         /* memory smaller than 1MB is impossible */
 104         if (dramsize < (1 << 20)) {
 105                 dramsize = 0;
 106         }
 107
 108         /* set SDRAM CS0 size according to the amount of RAM found */
 109         if (dramsize > 0) {
 110                 *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 + __builtin_ffs(dramsize >> 20) - 1;
 111         } else {
 112                 *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */
 113         }
 114
 115         /* let SDRAM CS1 start right after CS0 */
 116         *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize + 0x0000001e;/* 2G */
 117
 118         /* find RAM size using SDRAM CS1 only */
 119         if (!dramsize)
 120                 sdram_start(0);
 121         test2 = test1 = get_ram_size((long *)(CONFIG_SYS_SDRAM_BASE + dramsize), 0x80000000);
 122         if (!dramsize) {
 123                 sdram_start(1);
 124                 test2 = get_ram_size((long *)(CONFIG_SYS_SDRAM_BASE + dramsize), 0x80000000);
 125         }
 126         if (test1 > test2) {
 127                 sdram_start(0);
 128                 dramsize2 = test1;
 129         } else {
 130                 dramsize2 = test2;
 131         }
 132
 133         /* memory smaller than 1MB is impossible */
 134         if (dramsize2 < (1 << 20)) {
 135                 dramsize2 = 0;
 136         }
 137
 138         /* set SDRAM CS1 size according to the amount of RAM found */
 139         if (dramsize2 > 0) {
 140                 *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize
 141                         | (0x13 + __builtin_ffs(dramsize2 >> 20) - 1);
 142         } else {
 143                 *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize; /* disabled */
 144         }
 145
 146 #else /* CONFIG_SYS_RAMBOOT */
 147
 148         /* retrieve size of memory connected to SDRAM CS0 */
 149         dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF;
 150         if (dramsize >= 0x13) {
 151                 dramsize = (1 << (dramsize - 0x13)) << 20;
 152         } else {
 153                 dramsize = 0;
 154         }
 155
 156         /* retrieve size of memory connected to SDRAM CS1 */
 157         dramsize2 = *(vu_long *)MPC5XXX_SDRAM_CS1CFG & 0xFF;
 158         if (dramsize2 >= 0x13) {
 159                 dramsize2 = (1 << (dramsize2 - 0x13)) << 20;
 160         } else {
 161                 dramsize2 = 0;
 162         }
 163
 164 #endif /* CONFIG_SYS_RAMBOOT */
 165
 166         return dramsize + dramsize2;
 167 }
 168
 169 int checkboard (void)
 170 {
 171         puts ("Board: CANMB\n");
 172         return 0;
 173 }
 174
 175 int board_early_init_r (void)
 176 {
 177         *(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
 178         *(vu_long *)MPC5XXX_BOOTCS_START =
 179         *(vu_long *)MPC5XXX_CS0_START = START_REG(CONFIG_SYS_FLASH_BASE);
 180         *(vu_long *)MPC5XXX_BOOTCS_STOP =
 181         *(vu_long *)MPC5XXX_CS0_STOP = STOP_REG(CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_SIZE);
 182         return 0;
 183 }