Prepare v2023.10
[platform/kernel/u-boot.git] / board / calao / usb_a9263 / usb_a9263.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2007-2013
4  * Stelian Pop <stelian.pop@leadtechdesign.com>
5  * Lead Tech Design <www.leadtechdesign.com>
6  * Thomas Petazzoni, Free Electrons, <thomas.petazzoni@free-electrons.com>
7  * Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
8  */
9
10 #include <common.h>
11 #include <init.h>
12 #include <asm/arch/at91sam9_smc.h>
13 #include <asm/arch/at91_common.h>
14 #include <asm/arch/at91_matrix.h>
15 #include <asm/arch/clk.h>
16 #include <asm/arch/gpio.h>
17 #include <asm-generic/gpio.h>
18 #include <asm/global_data.h>
19 #include <asm/io.h>
20 #include <net.h>
21 #include <netdev.h>
22
23 DECLARE_GLOBAL_DATA_PTR;
24
25 #ifdef CONFIG_CMD_NAND
26 static void usb_a9263_nand_hw_init(void)
27 {
28         unsigned long csa;
29         at91_smc_t *smc = (at91_smc_t *)ATMEL_BASE_SMC0;
30         at91_matrix_t *matrix = (at91_matrix_t *)ATMEL_BASE_MATRIX;
31
32         /* Enable CS3 */
33         csa = readl(&matrix->csa[0]) | AT91_MATRIX_CSA_EBI_CS3A;
34         writel(csa, &matrix->csa[0]);
35
36         /* Configure SMC CS3 for NAND/SmartMedia */
37         writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
38                AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
39                &smc->cs[3].setup);
40
41         writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
42                AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
43                &smc->cs[3].pulse);
44
45         writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
46                &smc->cs[3].cycle);
47
48         writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
49                AT91_SMC_MODE_EXNW_DISABLE |
50                AT91_SMC_MODE_DBW_8 |
51                AT91_SMC_MODE_TDF_CYCLE(2), &smc->cs[3].mode);
52
53         at91_periph_clk_enable(ATMEL_ID_PIOA);
54         at91_periph_clk_enable(ATMEL_ID_PIOCDE);
55
56         /* Configure RDY/BSY */
57         gpio_request(CFG_SYS_NAND_READY_PIN, "NAND ready/busy");
58         gpio_direction_input(CFG_SYS_NAND_READY_PIN);
59
60         /* Enable NandFlash */
61         gpio_request(CFG_SYS_NAND_ENABLE_PIN, "NAND enable");
62         gpio_direction_output(CFG_SYS_NAND_ENABLE_PIN, 1);
63 }
64 #endif
65
66 #ifdef CONFIG_MACB
67 static void usb_a9263_macb_hw_init(void)
68 {
69         at91_periph_clk_enable(ATMEL_ID_EMAC);
70
71         /*
72          * Disable pull-up on:
73          *  RXDV (PC25) => PHY normal mode (not Test mode)
74          *  ERX0 (PE25) => PHY ADDR0
75          *  ERX1 (PE26) => PHY ADDR1 => PHYADDR = 0x0
76          *
77          * PHY has internal weak pull-up/pull-down
78          */
79         gpio_request(GPIO_PIN_PC(25), "PHY mode");
80         gpio_direction_input(GPIO_PIN_PC(25));
81
82         gpio_request(GPIO_PIN_PE(25), "PHY ADDR0");
83         gpio_direction_input(GPIO_PIN_PE(25));
84
85         gpio_request(GPIO_PIN_PE(26), "PHY ADDR1");
86         gpio_direction_input(GPIO_PIN_PE(26));
87
88         at91_phy_reset();
89
90         /* It will set proper pinmux for ports PC25, PE25-26 */
91         at91_macb_hw_init();
92 }
93 #endif
94
95 int board_init(void)
96 {
97         /* adress of boot parameters */
98         gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
99
100 #ifdef CONFIG_CMD_NAND
101         usb_a9263_nand_hw_init();
102 #endif
103 #ifdef CONFIG_MACB
104         usb_a9263_macb_hw_init();
105 #endif
106 #ifdef CONFIG_USB_OHCI_NEW
107         at91_uhp_hw_init();
108 #endif
109         return 0;
110 }
111
112 int dram_init(void)
113 {
114         gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
115                                     CFG_SYS_SDRAM_SIZE);
116         return 0;
117 }
118
119 int board_eth_init(struct bd_info *bis)
120 {
121         int rc = 0;
122
123 #ifdef CONFIG_MACB
124         rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x0001);
125 #endif
126         return rc;
127 }