common: Move RAM-sizing functions to init.h
[platform/kernel/u-boot.git] / board / calao / usb_a9263 / usb_a9263.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2007-2013
4  * Stelian Pop <stelian.pop@leadtechdesign.com>
5  * Lead Tech Design <www.leadtechdesign.com>
6  * Thomas Petazzoni, Free Electrons, <thomas.petazzoni@free-electrons.com>
7  * Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
8  */
9
10 #include <common.h>
11 #include <init.h>
12 #include <asm/arch/at91sam9_smc.h>
13 #include <asm/arch/at91_common.h>
14 #include <asm/arch/at91_matrix.h>
15 #include <asm/arch/clk.h>
16 #include <asm/arch/gpio.h>
17 #include <asm-generic/gpio.h>
18 #include <asm/io.h>
19 #include <net.h>
20 #include <netdev.h>
21
22 DECLARE_GLOBAL_DATA_PTR;
23
24 #ifdef CONFIG_CMD_NAND
25 static void usb_a9263_nand_hw_init(void)
26 {
27         unsigned long csa;
28         at91_smc_t *smc = (at91_smc_t *)ATMEL_BASE_SMC0;
29         at91_matrix_t *matrix = (at91_matrix_t *)ATMEL_BASE_MATRIX;
30
31         /* Enable CS3 */
32         csa = readl(&matrix->csa[0]) | AT91_MATRIX_CSA_EBI_CS3A;
33         writel(csa, &matrix->csa[0]);
34
35         /* Configure SMC CS3 for NAND/SmartMedia */
36         writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
37                AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
38                &smc->cs[3].setup);
39
40         writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
41                AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
42                &smc->cs[3].pulse);
43
44         writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
45                &smc->cs[3].cycle);
46
47         writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
48                AT91_SMC_MODE_EXNW_DISABLE |
49                AT91_SMC_MODE_DBW_8 |
50                AT91_SMC_MODE_TDF_CYCLE(2), &smc->cs[3].mode);
51
52         at91_periph_clk_enable(ATMEL_ID_PIOA);
53         at91_periph_clk_enable(ATMEL_ID_PIOCDE);
54
55         /* Configure RDY/BSY */
56         gpio_request(CONFIG_SYS_NAND_READY_PIN, "NAND ready/busy");
57         gpio_direction_input(CONFIG_SYS_NAND_READY_PIN);
58
59         /* Enable NandFlash */
60         gpio_request(CONFIG_SYS_NAND_ENABLE_PIN, "NAND enable");
61         gpio_direction_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
62 }
63 #endif
64
65 #ifdef CONFIG_MACB
66 static void usb_a9263_macb_hw_init(void)
67 {
68         at91_periph_clk_enable(ATMEL_ID_EMAC);
69
70         /*
71          * Disable pull-up on:
72          *  RXDV (PC25) => PHY normal mode (not Test mode)
73          *  ERX0 (PE25) => PHY ADDR0
74          *  ERX1 (PE26) => PHY ADDR1 => PHYADDR = 0x0
75          *
76          * PHY has internal weak pull-up/pull-down
77          */
78         gpio_request(GPIO_PIN_PC(25), "PHY mode");
79         gpio_direction_input(GPIO_PIN_PC(25));
80
81         gpio_request(GPIO_PIN_PE(25), "PHY ADDR0");
82         gpio_direction_input(GPIO_PIN_PE(25));
83
84         gpio_request(GPIO_PIN_PE(26), "PHY ADDR1");
85         gpio_direction_input(GPIO_PIN_PE(26));
86
87         at91_phy_reset();
88
89         /* It will set proper pinmux for ports PC25, PE25-26 */
90         at91_macb_hw_init();
91 }
92 #endif
93
94 int board_init(void)
95 {
96         /* adress of boot parameters */
97         gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
98
99 #ifdef CONFIG_CMD_NAND
100         usb_a9263_nand_hw_init();
101 #endif
102 #ifdef CONFIG_MACB
103         usb_a9263_macb_hw_init();
104 #endif
105 #ifdef CONFIG_USB_OHCI_NEW
106         at91_uhp_hw_init();
107 #endif
108         return 0;
109 }
110
111 int dram_init(void)
112 {
113         gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
114                                     CONFIG_SYS_SDRAM_SIZE);
115         return 0;
116 }
117
118 int board_eth_init(bd_t *bis)
119 {
120         int rc = 0;
121
122 #ifdef CONFIG_MACB
123         rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x0001);
124 #endif
125         return rc;
126 }