1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2018 Cisco Systems, Inc.
4 * (C) Copyright 2019 Synamedia
6 * Author: Thomas Fitzsimmons <fitzsim@fitzsim.org>
12 #include <linux/types.h>
16 #include <asm/bootm.h>
17 #include <mach/timer.h>
21 DECLARE_GLOBAL_DATA_PTR;
23 #define BCMSTB_DATA_SECTION __attribute__((section(".data")))
25 struct bcmstb_boot_parameters bcmstb_boot_parameters BCMSTB_DATA_SECTION;
27 phys_addr_t prior_stage_fdt_address BCMSTB_DATA_SECTION;
29 union reg_value_union {
31 const phys_addr_t *address;
39 u32 get_board_rev(void)
44 void reset_cpu(ulong ignored)
48 int print_cpuinfo(void)
55 if (fdtdec_setup_mem_size_base() != 0)
61 int dram_init_banksize(void)
63 fdtdec_setup_memory_banksize();
66 * On this SoC, U-Boot is running as an ELF file. Change the
67 * relocation address to CONFIG_SYS_TEXT_BASE, so that in
68 * setup_reloc, gd->reloc_off works out to 0, effectively
69 * disabling relocation. Otherwise U-Boot hangs in the setup
70 * instructions just before relocate_code in
71 * arch/arm/lib/crt0.S.
73 gd->relocaddr = CONFIG_SYS_TEXT_BASE;
78 void enable_caches(void)
81 * This port assumes that the prior stage bootloader has
82 * enabled I-cache and D-cache already. Implementing this
83 * function silences the warning in the default function.
89 gd->arch.timer_rate_hz = readl(BCMSTB_TIMER_FREQUENCY);
96 return gd->arch.timer_rate_hz;
99 uint64_t get_ticks(void)
101 gd->timebase_h = readl(BCMSTB_TIMER_HIGH);
102 gd->timebase_l = readl(BCMSTB_TIMER_LOW);
104 return ((uint64_t)gd->timebase_h << 32) | gd->timebase_l;
107 int board_late_init(void)
109 debug("Arguments from prior stage bootloader:\n");
110 debug("General Purpose Register 0: 0x%x\n", bcmstb_boot_parameters.r0);
111 debug("General Purpose Register 1: 0x%x\n", bcmstb_boot_parameters.r1);
112 debug("General Purpose Register 2: 0x%x\n", bcmstb_boot_parameters.r2);
113 debug("General Purpose Register 3: 0x%x\n", bcmstb_boot_parameters.r3);
114 debug("Stack Pointer Register: 0x%x\n", bcmstb_boot_parameters.sp);
115 debug("Link Register: 0x%x\n", bcmstb_boot_parameters.lr);
116 debug("Assuming timer frequency register at: 0x%p\n",
117 (void *)BCMSTB_TIMER_FREQUENCY);
118 debug("Read timer frequency (in Hz): %ld\n", gd->arch.timer_rate_hz);
119 debug("Prior stage provided DTB at: 0x%p\n",
120 (void *)prior_stage_fdt_address);
123 * Set fdtcontroladdr in the environment so that scripts can
124 * refer to it, for example, to reuse it for fdtaddr.
126 env_set_hex("fdtcontroladdr", prior_stage_fdt_address);
129 * Do not set machid to the machine identifier value provided
130 * by the prior stage bootloader (bcmstb_boot_parameters.r1)
131 * because we're using a device tree to boot Linux.