1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2010-2013 Freescale Semiconductor, Inc.
4 * Copyright (C) 2013, Boundary Devices <info@boundarydevices.com>
13 #include <asm/arch/clock.h>
14 #include <asm/arch/imx-regs.h>
15 #include <asm/arch/iomux.h>
16 #include <asm/arch/sys_proto.h>
18 #include <asm/arch/mx6-pins.h>
19 #include <linux/delay.h>
20 #include <linux/errno.h>
22 #include <asm/mach-imx/iomux-v3.h>
23 #include <asm/mach-imx/mxc_i2c.h>
24 #include <asm/mach-imx/sata.h>
25 #include <asm/mach-imx/spi.h>
26 #include <asm/mach-imx/boot_mode.h>
27 #include <asm/mach-imx/video.h>
28 #include <fsl_esdhc_imx.h>
32 #include <asm/arch/crm_regs.h>
33 #include <asm/arch/mxc_hdmi.h>
37 #include <usb/ehci-ci.h>
39 DECLARE_GLOBAL_DATA_PTR;
40 #define GP_USB_OTG_PWR IMX_GPIO_NR(3, 22)
42 #define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
43 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
44 PAD_CTL_SRE_FAST | PAD_CTL_HYS)
46 #define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \
47 PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
48 PAD_CTL_SRE_FAST | PAD_CTL_HYS)
50 #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
51 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
53 #define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
54 PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
56 #define BUTTON_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
57 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
59 #define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
60 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
61 PAD_CTL_ODE | PAD_CTL_SRE_FAST)
63 #define RGB_PAD_CTRL PAD_CTL_DSE_120ohm
65 #define WEAK_PULLUP (PAD_CTL_PUS_100K_UP | \
66 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
69 #define WEAK_PULLDOWN (PAD_CTL_PUS_100K_DOWN | \
70 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
71 PAD_CTL_HYS | PAD_CTL_SRE_SLOW)
73 #define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm)
75 /* Prevent compiler error if gpio number 08 or 09 is used */
76 #define not_octal(gp) ((((0x##gp >> 4) & 0xf) * 10) + ((0x##gp & 0xf)))
78 #define _I2C_PADS_INFO_CPU(cpu, i2cnum, scl_pad, scl_bank, scl_gp, \
79 sda_pad, sda_bank, sda_gp, pad_ctrl, join_io) { \
81 .i2c_mode = NEW_PAD_CTRL(cpu##_PAD_##scl_pad##__##i2cnum##_SCL,\
83 .gpio_mode = NEW_PAD_CTRL( \
84 cpu##_PAD_##scl_pad##__GPIO##scl_bank##join_io##scl_gp,\
86 .gp = IMX_GPIO_NR(scl_bank, not_octal(scl_gp)) \
89 .i2c_mode = NEW_PAD_CTRL(cpu##_PAD_##sda_pad##__##i2cnum##_SDA,\
91 .gpio_mode = NEW_PAD_CTRL( \
92 cpu##_PAD_##sda_pad##__GPIO##sda_bank##join_io##sda_gp,\
94 .gp = IMX_GPIO_NR(sda_bank, not_octal(sda_gp)) \
98 #define I2C_PADS_INFO_CPU(cpu, i2cnum, scl_pad, scl_bank, scl_gp, \
99 sda_pad, sda_bank, sda_gp, pad_ctrl) \
100 _I2C_PADS_INFO_CPU(cpu, i2cnum, scl_pad, scl_bank, scl_gp, \
101 sda_pad, sda_bank, sda_gp, pad_ctrl, _IO)
103 #if defined(CONFIG_MX6QDL)
104 #define I2C_PADS_INFO_ENTRY(i2cnum, scl_pad, scl_bank, scl_gp, \
105 sda_pad, sda_bank, sda_gp, pad_ctrl) \
106 I2C_PADS_INFO_CPU(MX6Q, i2cnum, scl_pad, scl_bank, scl_gp, \
107 sda_pad, sda_bank, sda_gp, pad_ctrl), \
108 I2C_PADS_INFO_CPU(MX6DL, i2cnum, scl_pad, scl_bank, scl_gp, \
109 sda_pad, sda_bank, sda_gp, pad_ctrl)
110 #define I2C_PADS_INFO_ENTRY_SPACING 2
112 #define IOMUX_PAD_CTRL(name, pad_ctrl) \
113 NEW_PAD_CTRL(MX6Q_PAD_##name, pad_ctrl), \
114 NEW_PAD_CTRL(MX6DL_PAD_##name, pad_ctrl)
116 #define I2C_PADS_INFO_ENTRY(i2cnum, scl_pad, scl_bank, scl_gp, \
117 sda_pad, sda_bank, sda_gp, pad_ctrl) \
118 I2C_PADS_INFO_CPU(MX6, i2cnum, scl_pad, scl_bank, scl_gp, \
119 sda_pad, sda_bank, sda_gp, pad_ctrl)
120 #define I2C_PADS_INFO_ENTRY_SPACING 1
122 #define IOMUX_PAD_CTRL(name, pad_ctrl) NEW_PAD_CTRL(MX6_PAD_##name, pad_ctrl)
127 gd->ram_size = ((ulong)CONFIG_DDR_MB * 1024 * 1024);
132 static iomux_v3_cfg_t const uart1_pads[] = {
133 IOMUX_PAD_CTRL(SD3_DAT6__UART1_RX_DATA, UART_PAD_CTRL),
134 IOMUX_PAD_CTRL(SD3_DAT7__UART1_TX_DATA, UART_PAD_CTRL),
137 static iomux_v3_cfg_t const uart2_pads[] = {
138 IOMUX_PAD_CTRL(EIM_D26__UART2_TX_DATA, UART_PAD_CTRL),
139 IOMUX_PAD_CTRL(EIM_D27__UART2_RX_DATA, UART_PAD_CTRL),
142 static struct i2c_pads_info i2c_pads[] = {
144 I2C_PADS_INFO_ENTRY(I2C1, EIM_D21, 3, 21, EIM_D28, 3, 28, I2C_PAD_CTRL),
145 /* I2C2 Camera, MIPI */
146 I2C_PADS_INFO_ENTRY(I2C2, KEY_COL3, 4, 12, KEY_ROW3, 4, 13,
148 /* I2C3, J15 - RGB connector */
149 I2C_PADS_INFO_ENTRY(I2C3, GPIO_5, 1, 05, GPIO_16, 7, 11, I2C_PAD_CTRL),
152 #define I2C_BUS_CNT 3
154 static iomux_v3_cfg_t const usdhc2_pads[] = {
155 IOMUX_PAD_CTRL(SD2_CLK__SD2_CLK, USDHC_PAD_CTRL),
156 IOMUX_PAD_CTRL(SD2_CMD__SD2_CMD, USDHC_PAD_CTRL),
157 IOMUX_PAD_CTRL(SD2_DAT0__SD2_DATA0, USDHC_PAD_CTRL),
158 IOMUX_PAD_CTRL(SD2_DAT1__SD2_DATA1, USDHC_PAD_CTRL),
159 IOMUX_PAD_CTRL(SD2_DAT2__SD2_DATA2, USDHC_PAD_CTRL),
160 IOMUX_PAD_CTRL(SD2_DAT3__SD2_DATA3, USDHC_PAD_CTRL),
163 static iomux_v3_cfg_t const enet_pads1[] = {
164 IOMUX_PAD_CTRL(ENET_MDIO__ENET_MDIO, ENET_PAD_CTRL),
165 IOMUX_PAD_CTRL(ENET_MDC__ENET_MDC, ENET_PAD_CTRL),
166 IOMUX_PAD_CTRL(RGMII_TXC__RGMII_TXC, ENET_PAD_CTRL),
167 IOMUX_PAD_CTRL(RGMII_TD0__RGMII_TD0, ENET_PAD_CTRL),
168 IOMUX_PAD_CTRL(RGMII_TD1__RGMII_TD1, ENET_PAD_CTRL),
169 IOMUX_PAD_CTRL(RGMII_TD2__RGMII_TD2, ENET_PAD_CTRL),
170 IOMUX_PAD_CTRL(RGMII_TD3__RGMII_TD3, ENET_PAD_CTRL),
171 IOMUX_PAD_CTRL(RGMII_TX_CTL__RGMII_TX_CTL, ENET_PAD_CTRL),
172 IOMUX_PAD_CTRL(ENET_REF_CLK__ENET_TX_CLK, ENET_PAD_CTRL),
173 /* pin 35 - 1 (PHY_AD2) on reset */
174 IOMUX_PAD_CTRL(RGMII_RXC__GPIO6_IO30, NO_PAD_CTRL),
175 /* pin 32 - 1 - (MODE0) all */
176 IOMUX_PAD_CTRL(RGMII_RD0__GPIO6_IO25, NO_PAD_CTRL),
177 /* pin 31 - 1 - (MODE1) all */
178 IOMUX_PAD_CTRL(RGMII_RD1__GPIO6_IO27, NO_PAD_CTRL),
179 /* pin 28 - 1 - (MODE2) all */
180 IOMUX_PAD_CTRL(RGMII_RD2__GPIO6_IO28, NO_PAD_CTRL),
181 /* pin 27 - 1 - (MODE3) all */
182 IOMUX_PAD_CTRL(RGMII_RD3__GPIO6_IO29, NO_PAD_CTRL),
183 /* pin 33 - 1 - (CLK125_EN) 125Mhz clockout enabled */
184 IOMUX_PAD_CTRL(RGMII_RX_CTL__GPIO6_IO24, NO_PAD_CTRL),
185 /* pin 42 PHY nRST */
186 IOMUX_PAD_CTRL(EIM_D23__GPIO3_IO23, NO_PAD_CTRL),
187 IOMUX_PAD_CTRL(ENET_RXD0__GPIO1_IO27, NO_PAD_CTRL),
190 static iomux_v3_cfg_t const enet_pads2[] = {
191 IOMUX_PAD_CTRL(RGMII_RXC__RGMII_RXC, ENET_PAD_CTRL),
192 IOMUX_PAD_CTRL(RGMII_RD0__RGMII_RD0, ENET_PAD_CTRL),
193 IOMUX_PAD_CTRL(RGMII_RD1__RGMII_RD1, ENET_PAD_CTRL),
194 IOMUX_PAD_CTRL(RGMII_RD2__RGMII_RD2, ENET_PAD_CTRL),
195 IOMUX_PAD_CTRL(RGMII_RD3__RGMII_RD3, ENET_PAD_CTRL),
196 IOMUX_PAD_CTRL(RGMII_RX_CTL__RGMII_RX_CTL, ENET_PAD_CTRL),
199 static iomux_v3_cfg_t const misc_pads[] = {
200 IOMUX_PAD_CTRL(GPIO_1__USB_OTG_ID, WEAK_PULLUP),
201 IOMUX_PAD_CTRL(KEY_COL4__USB_OTG_OC, WEAK_PULLUP),
202 IOMUX_PAD_CTRL(EIM_D30__USB_H1_OC, WEAK_PULLUP),
203 /* OTG Power enable */
204 IOMUX_PAD_CTRL(EIM_D22__GPIO3_IO22, OUTPUT_40OHM),
207 /* wl1271 pads on nitrogen6x */
208 static iomux_v3_cfg_t const wl12xx_pads[] = {
209 IOMUX_PAD_CTRL(NANDF_CS1__GPIO6_IO14, WEAK_PULLDOWN),
210 IOMUX_PAD_CTRL(NANDF_CS2__GPIO6_IO15, OUTPUT_40OHM),
211 IOMUX_PAD_CTRL(NANDF_CS3__GPIO6_IO16, OUTPUT_40OHM),
213 #define WL12XX_WL_IRQ_GP IMX_GPIO_NR(6, 14)
214 #define WL12XX_WL_ENABLE_GP IMX_GPIO_NR(6, 15)
215 #define WL12XX_BT_ENABLE_GP IMX_GPIO_NR(6, 16)
217 /* Button assignments for J14 */
218 static iomux_v3_cfg_t const button_pads[] = {
220 IOMUX_PAD_CTRL(NANDF_D1__GPIO2_IO01, BUTTON_PAD_CTRL),
222 IOMUX_PAD_CTRL(NANDF_D2__GPIO2_IO02, BUTTON_PAD_CTRL),
223 /* Labelled Search (mapped to Power under Android) */
224 IOMUX_PAD_CTRL(NANDF_D3__GPIO2_IO03, BUTTON_PAD_CTRL),
226 IOMUX_PAD_CTRL(NANDF_D4__GPIO2_IO04, BUTTON_PAD_CTRL),
228 IOMUX_PAD_CTRL(GPIO_19__GPIO4_IO05, BUTTON_PAD_CTRL),
230 IOMUX_PAD_CTRL(GPIO_18__GPIO7_IO13, BUTTON_PAD_CTRL),
233 static void setup_iomux_enet(void)
235 gpio_direction_output(IMX_GPIO_NR(3, 23), 0); /* SABRE Lite PHY rst */
236 gpio_direction_output(IMX_GPIO_NR(1, 27), 0); /* Nitrogen6X PHY rst */
237 gpio_direction_output(IMX_GPIO_NR(6, 30), 1);
238 gpio_direction_output(IMX_GPIO_NR(6, 25), 1);
239 gpio_direction_output(IMX_GPIO_NR(6, 27), 1);
240 gpio_direction_output(IMX_GPIO_NR(6, 28), 1);
241 gpio_direction_output(IMX_GPIO_NR(6, 29), 1);
242 SETUP_IOMUX_PADS(enet_pads1);
243 gpio_direction_output(IMX_GPIO_NR(6, 24), 1);
245 /* Need delay 10ms according to KSZ9021 spec */
247 gpio_set_value(IMX_GPIO_NR(3, 23), 1); /* SABRE Lite PHY reset */
248 gpio_set_value(IMX_GPIO_NR(1, 27), 1); /* Nitrogen6X PHY reset */
250 SETUP_IOMUX_PADS(enet_pads2);
251 udelay(100); /* Wait 100 us before using mii interface */
254 static iomux_v3_cfg_t const usb_pads[] = {
255 IOMUX_PAD_CTRL(GPIO_17__GPIO7_IO12, NO_PAD_CTRL),
258 static void setup_iomux_uart(void)
260 SETUP_IOMUX_PADS(uart1_pads);
261 SETUP_IOMUX_PADS(uart2_pads);
264 #ifdef CONFIG_USB_EHCI_MX6
265 int board_ehci_hcd_init(int port)
267 SETUP_IOMUX_PADS(usb_pads);
270 gpio_direction_output(IMX_GPIO_NR(7, 12), 0);
272 gpio_set_value(IMX_GPIO_NR(7, 12), 1);
277 int board_ehci_power(int port, int on)
281 gpio_set_value(GP_USB_OTG_PWR, on);
287 #ifdef CONFIG_MXC_SPI
288 int board_spi_cs_gpio(unsigned bus, unsigned cs)
290 return (bus == 0 && cs == 0) ? (IMX_GPIO_NR(3, 19)) : -1;
293 static iomux_v3_cfg_t const ecspi1_pads[] = {
295 IOMUX_PAD_CTRL(EIM_D19__GPIO3_IO19, NO_PAD_CTRL),
296 IOMUX_PAD_CTRL(EIM_D17__ECSPI1_MISO, SPI_PAD_CTRL),
297 IOMUX_PAD_CTRL(EIM_D18__ECSPI1_MOSI, SPI_PAD_CTRL),
298 IOMUX_PAD_CTRL(EIM_D16__ECSPI1_SCLK, SPI_PAD_CTRL),
301 static void setup_spi(void)
303 SETUP_IOMUX_PADS(ecspi1_pads);
307 int board_phy_config(struct phy_device *phydev)
309 /* min rx data delay */
310 ksz9021_phy_extended_write(phydev,
311 MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW, 0x0);
312 /* min tx data delay */
313 ksz9021_phy_extended_write(phydev,
314 MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW, 0x0);
315 /* max rx/tx clock delay, min rx/tx control */
316 ksz9021_phy_extended_write(phydev,
317 MII_KSZ9021_EXT_RGMII_CLOCK_SKEW, 0xf0f0);
318 if (phydev->drv->config)
319 phydev->drv->config(phydev);
324 int board_eth_init(bd_t *bis)
326 uint32_t base = IMX_FEC_BASE;
327 struct mii_dev *bus = NULL;
328 struct phy_device *phydev = NULL;
331 gpio_request(WL12XX_WL_IRQ_GP, "wifi_irq");
332 gpio_request(IMX_GPIO_NR(6, 30), "rgmii_rxc");
333 gpio_request(IMX_GPIO_NR(6, 25), "rgmii_rd0");
334 gpio_request(IMX_GPIO_NR(6, 27), "rgmii_rd1");
335 gpio_request(IMX_GPIO_NR(6, 28), "rgmii_rd2");
336 gpio_request(IMX_GPIO_NR(6, 29), "rgmii_rd3");
337 gpio_request(IMX_GPIO_NR(6, 24), "rgmii_rx_ctl");
338 gpio_request(IMX_GPIO_NR(3, 23), "rgmii_reset_sabrelite");
339 gpio_request(IMX_GPIO_NR(1, 27), "rgmii_reset_nitrogen6x");
342 #ifdef CONFIG_FEC_MXC
343 bus = fec_get_miibus(base, -1);
346 /* scan phy 4,5,6,7 */
347 phydev = phy_find_by_mask(bus, (0xf << 4), PHY_INTERFACE_MODE_RGMII);
352 printf("using phy at %d\n", phydev->addr);
353 ret = fec_probe(bis, -1, base, bus, phydev);
359 /* For otg ethernet*/
360 usb_eth_initialize(bis);
371 static void setup_buttons(void)
373 SETUP_IOMUX_PADS(button_pads);
376 #if defined(CONFIG_VIDEO_IPUV3)
378 static iomux_v3_cfg_t const backlight_pads[] = {
379 /* Backlight on RGB connector: J15 */
380 IOMUX_PAD_CTRL(SD1_DAT3__GPIO1_IO21, NO_PAD_CTRL),
381 #define RGB_BACKLIGHT_GP IMX_GPIO_NR(1, 21)
383 /* Backlight on LVDS connector: J6 */
384 IOMUX_PAD_CTRL(SD1_CMD__GPIO1_IO18, NO_PAD_CTRL),
385 #define LVDS_BACKLIGHT_GP IMX_GPIO_NR(1, 18)
388 static iomux_v3_cfg_t const rgb_pads[] = {
389 IOMUX_PAD_CTRL(DI0_DISP_CLK__IPU1_DI0_DISP_CLK, RGB_PAD_CTRL),
390 IOMUX_PAD_CTRL(DI0_PIN15__IPU1_DI0_PIN15, RGB_PAD_CTRL),
391 IOMUX_PAD_CTRL(DI0_PIN2__IPU1_DI0_PIN02, RGB_PAD_CTRL),
392 IOMUX_PAD_CTRL(DI0_PIN3__IPU1_DI0_PIN03, RGB_PAD_CTRL),
393 IOMUX_PAD_CTRL(DI0_PIN4__GPIO4_IO20, RGB_PAD_CTRL),
394 IOMUX_PAD_CTRL(DISP0_DAT0__IPU1_DISP0_DATA00, RGB_PAD_CTRL),
395 IOMUX_PAD_CTRL(DISP0_DAT1__IPU1_DISP0_DATA01, RGB_PAD_CTRL),
396 IOMUX_PAD_CTRL(DISP0_DAT2__IPU1_DISP0_DATA02, RGB_PAD_CTRL),
397 IOMUX_PAD_CTRL(DISP0_DAT3__IPU1_DISP0_DATA03, RGB_PAD_CTRL),
398 IOMUX_PAD_CTRL(DISP0_DAT4__IPU1_DISP0_DATA04, RGB_PAD_CTRL),
399 IOMUX_PAD_CTRL(DISP0_DAT5__IPU1_DISP0_DATA05, RGB_PAD_CTRL),
400 IOMUX_PAD_CTRL(DISP0_DAT6__IPU1_DISP0_DATA06, RGB_PAD_CTRL),
401 IOMUX_PAD_CTRL(DISP0_DAT7__IPU1_DISP0_DATA07, RGB_PAD_CTRL),
402 IOMUX_PAD_CTRL(DISP0_DAT8__IPU1_DISP0_DATA08, RGB_PAD_CTRL),
403 IOMUX_PAD_CTRL(DISP0_DAT9__IPU1_DISP0_DATA09, RGB_PAD_CTRL),
404 IOMUX_PAD_CTRL(DISP0_DAT10__IPU1_DISP0_DATA10, RGB_PAD_CTRL),
405 IOMUX_PAD_CTRL(DISP0_DAT11__IPU1_DISP0_DATA11, RGB_PAD_CTRL),
406 IOMUX_PAD_CTRL(DISP0_DAT12__IPU1_DISP0_DATA12, RGB_PAD_CTRL),
407 IOMUX_PAD_CTRL(DISP0_DAT13__IPU1_DISP0_DATA13, RGB_PAD_CTRL),
408 IOMUX_PAD_CTRL(DISP0_DAT14__IPU1_DISP0_DATA14, RGB_PAD_CTRL),
409 IOMUX_PAD_CTRL(DISP0_DAT15__IPU1_DISP0_DATA15, RGB_PAD_CTRL),
410 IOMUX_PAD_CTRL(DISP0_DAT16__IPU1_DISP0_DATA16, RGB_PAD_CTRL),
411 IOMUX_PAD_CTRL(DISP0_DAT17__IPU1_DISP0_DATA17, RGB_PAD_CTRL),
412 IOMUX_PAD_CTRL(DISP0_DAT18__IPU1_DISP0_DATA18, RGB_PAD_CTRL),
413 IOMUX_PAD_CTRL(DISP0_DAT19__IPU1_DISP0_DATA19, RGB_PAD_CTRL),
414 IOMUX_PAD_CTRL(DISP0_DAT20__IPU1_DISP0_DATA20, RGB_PAD_CTRL),
415 IOMUX_PAD_CTRL(DISP0_DAT21__IPU1_DISP0_DATA21, RGB_PAD_CTRL),
416 IOMUX_PAD_CTRL(DISP0_DAT22__IPU1_DISP0_DATA22, RGB_PAD_CTRL),
417 IOMUX_PAD_CTRL(DISP0_DAT23__IPU1_DISP0_DATA23, RGB_PAD_CTRL),
420 static void do_enable_hdmi(struct display_info_t const *dev)
422 imx_enable_hdmi_phy();
425 static int detect_i2c(struct display_info_t const *dev)
427 return ((0 == i2c_set_bus_num(dev->bus))
429 (0 == i2c_probe(dev->addr)));
432 static void enable_lvds(struct display_info_t const *dev)
434 struct iomuxc *iomux = (struct iomuxc *)
436 u32 reg = readl(&iomux->gpr[2]);
437 reg |= IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT;
438 writel(reg, &iomux->gpr[2]);
439 gpio_direction_output(LVDS_BACKLIGHT_GP, 1);
442 static void enable_lvds_jeida(struct display_info_t const *dev)
444 struct iomuxc *iomux = (struct iomuxc *)
446 u32 reg = readl(&iomux->gpr[2]);
447 reg |= IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT
448 |IOMUXC_GPR2_BIT_MAPPING_CH0_JEIDA;
449 writel(reg, &iomux->gpr[2]);
450 gpio_direction_output(LVDS_BACKLIGHT_GP, 1);
453 static void enable_rgb(struct display_info_t const *dev)
455 SETUP_IOMUX_PADS(rgb_pads);
456 gpio_direction_output(RGB_BACKLIGHT_GP, 1);
459 struct display_info_t const displays[] = {{
462 .pixfmt = IPU_PIX_FMT_RGB24,
463 .detect = detect_i2c,
464 .enable = do_enable_hdmi,
478 .vmode = FB_VMODE_NONINTERLACED
482 .pixfmt = IPU_PIX_FMT_RGB24,
484 .enable = enable_lvds_jeida,
498 .vmode = FB_VMODE_NONINTERLACED
502 .pixfmt = IPU_PIX_FMT_RGB24,
504 .enable = enable_lvds,
506 .name = "LDB-WXGA-S",
518 .vmode = FB_VMODE_NONINTERLACED
522 .pixfmt = IPU_PIX_FMT_LVDS666,
523 .detect = detect_i2c,
524 .enable = enable_lvds,
526 .name = "Hannstar-XGA",
538 .vmode = FB_VMODE_NONINTERLACED
542 .pixfmt = IPU_PIX_FMT_LVDS666,
544 .enable = enable_lvds,
550 .pixclock = 15385, /* ~65MHz */
558 .vmode = FB_VMODE_NONINTERLACED
562 .pixfmt = IPU_PIX_FMT_LVDS666,
563 .detect = detect_i2c,
564 .enable = enable_lvds,
566 .name = "wsvga-lvds",
578 .vmode = FB_VMODE_NONINTERLACED
582 .pixfmt = IPU_PIX_FMT_RGB666,
583 .detect = detect_i2c,
584 .enable = enable_rgb,
598 .vmode = FB_VMODE_NONINTERLACED
602 .pixfmt = IPU_PIX_FMT_RGB666,
604 .enable = enable_rgb,
618 .vmode = FB_VMODE_NONINTERLACED
622 .pixfmt = IPU_PIX_FMT_LVDS666,
623 .detect = detect_i2c,
624 .enable = enable_lvds,
626 .name = "amp1024x600",
638 .vmode = FB_VMODE_NONINTERLACED
642 .pixfmt = IPU_PIX_FMT_LVDS666,
644 .enable = enable_lvds,
658 .vmode = FB_VMODE_NONINTERLACED
662 .pixfmt = IPU_PIX_FMT_RGB666,
663 .detect = detect_i2c,
664 .enable = enable_rgb,
678 .vmode = FB_VMODE_NONINTERLACED
682 .pixfmt = IPU_PIX_FMT_RGB24,
684 .enable = enable_rgb,
698 .vmode = FB_VMODE_NONINTERLACED
700 size_t display_count = ARRAY_SIZE(displays);
702 int board_cfb_skip(void)
704 return NULL != env_get("novideo");
707 static void setup_display(void)
709 struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
710 struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
715 /* Turn on LDB0,IPU,IPU DI0 clocks */
716 reg = __raw_readl(&mxc_ccm->CCGR3);
717 reg |= MXC_CCM_CCGR3_LDB_DI0_MASK;
718 writel(reg, &mxc_ccm->CCGR3);
720 /* set LDB0, LDB1 clk select to 011/011 */
721 reg = readl(&mxc_ccm->cs2cdr);
722 reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK
723 |MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK);
724 reg |= (3<<MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET)
725 |(3<<MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET);
726 writel(reg, &mxc_ccm->cs2cdr);
728 reg = readl(&mxc_ccm->cscmr2);
729 reg |= MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV;
730 writel(reg, &mxc_ccm->cscmr2);
732 reg = readl(&mxc_ccm->chsccdr);
733 reg |= (CHSCCDR_CLK_SEL_LDB_DI0
734 <<MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET);
735 writel(reg, &mxc_ccm->chsccdr);
737 reg = IOMUXC_GPR2_BGREF_RRMODE_EXTERNAL_RES
738 |IOMUXC_GPR2_DI1_VS_POLARITY_ACTIVE_HIGH
739 |IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW
740 |IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG
741 |IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT
742 |IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG
743 |IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT
744 |IOMUXC_GPR2_LVDS_CH1_MODE_DISABLED
745 |IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0;
746 writel(reg, &iomux->gpr[2]);
748 reg = readl(&iomux->gpr[3]);
749 reg = (reg & ~(IOMUXC_GPR3_LVDS0_MUX_CTL_MASK
750 |IOMUXC_GPR3_HDMI_MUX_CTL_MASK))
751 | (IOMUXC_GPR3_MUX_SRC_IPU1_DI0
752 <<IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET);
753 writel(reg, &iomux->gpr[3]);
755 /* backlights off until needed */
756 SETUP_IOMUX_PADS(backlight_pads);
757 gpio_direction_input(LVDS_BACKLIGHT_GP);
758 gpio_direction_input(RGB_BACKLIGHT_GP);
762 static iomux_v3_cfg_t const init_pads[] = {
763 /* SGTL5000 sys_mclk */
764 IOMUX_PAD_CTRL(GPIO_0__CCM_CLKO1, OUTPUT_40OHM),
766 /* J5 - Camera MCLK */
767 IOMUX_PAD_CTRL(GPIO_3__CCM_CLKO2, OUTPUT_40OHM),
769 /* wl1271 pads on nitrogen6x */
770 /* WL12XX_WL_IRQ_GP */
771 IOMUX_PAD_CTRL(NANDF_CS1__GPIO6_IO14, WEAK_PULLDOWN),
772 /* WL12XX_WL_ENABLE_GP */
773 IOMUX_PAD_CTRL(NANDF_CS2__GPIO6_IO15, OUTPUT_40OHM),
774 /* WL12XX_BT_ENABLE_GP */
775 IOMUX_PAD_CTRL(NANDF_CS3__GPIO6_IO16, OUTPUT_40OHM),
777 IOMUX_PAD_CTRL(EIM_D22__GPIO3_IO22, OUTPUT_40OHM),
778 IOMUX_PAD_CTRL(NANDF_D5__GPIO2_IO05, OUTPUT_40OHM),
779 IOMUX_PAD_CTRL(NANDF_WP_B__GPIO6_IO09, OUTPUT_40OHM),
780 IOMUX_PAD_CTRL(GPIO_8__GPIO1_IO08, OUTPUT_40OHM),
781 IOMUX_PAD_CTRL(GPIO_6__GPIO1_IO06, OUTPUT_40OHM),
784 #define WL12XX_WL_IRQ_GP IMX_GPIO_NR(6, 14)
786 static unsigned gpios_out_low[] = {
788 IMX_GPIO_NR(6, 15), /* disable wireless */
789 IMX_GPIO_NR(6, 16), /* disable bluetooth */
790 IMX_GPIO_NR(3, 22), /* disable USB otg power */
791 IMX_GPIO_NR(2, 5), /* ov5640 mipi camera reset */
792 IMX_GPIO_NR(1, 8), /* ov5642 reset */
795 static unsigned gpios_out_high[] = {
796 IMX_GPIO_NR(1, 6), /* ov5642 powerdown */
797 IMX_GPIO_NR(6, 9), /* ov5640 mipi camera power down */
800 static void set_gpios(unsigned *p, int cnt, int val)
804 for (i = 0; i < cnt; i++)
805 gpio_direction_output(*p++, val);
808 int board_early_init_f(void)
812 set_gpios(gpios_out_high, ARRAY_SIZE(gpios_out_high), 1);
813 set_gpios(gpios_out_low, ARRAY_SIZE(gpios_out_low), 0);
814 gpio_direction_input(WL12XX_WL_IRQ_GP);
816 SETUP_IOMUX_PADS(wl12xx_pads);
817 SETUP_IOMUX_PADS(init_pads);
820 #if defined(CONFIG_VIDEO_IPUV3)
827 * Do not overwrite the console
828 * Use always serial for U-Boot console
830 int overwrite_console(void)
837 struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
838 struct i2c_pads_info *p = i2c_pads;
842 #if defined(CONFIG_MX6QDL)
844 if (!is_mx6dq() && !is_mx6dqp())
847 clrsetbits_le32(&iomuxc_regs->gpr[1],
848 IOMUXC_GPR1_OTG_ID_MASK,
849 IOMUXC_GPR1_OTG_ID_GPIO1);
851 SETUP_IOMUX_PADS(misc_pads);
853 /* address of boot parameters */
854 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
856 #ifdef CONFIG_MXC_SPI
859 SETUP_IOMUX_PADS(usdhc2_pads);
860 for (i = 0; i < I2C_BUS_CNT; i++) {
861 setup_i2c(i, CONFIG_SYS_I2C_SPEED, 0x7f, p);
874 int ret = gpio_get_value(WL12XX_WL_IRQ_GP);
877 /* The gpios have not been probed yet. Read it myself */
878 struct gpio_regs *regs = (struct gpio_regs *)GPIO6_BASE_ADDR;
879 int gpio = WL12XX_WL_IRQ_GP & 0x1f;
881 ret = (readl(®s->gpio_psr) >> gpio) & 0x01;
884 puts("Board: Nitrogen6X\n");
886 puts("Board: SABRE Lite\n");
897 static struct button_key const buttons[] = {
898 {"back", IMX_GPIO_NR(2, 2), 'B'},
899 {"home", IMX_GPIO_NR(2, 4), 'H'},
900 {"menu", IMX_GPIO_NR(2, 1), 'M'},
901 {"search", IMX_GPIO_NR(2, 3), 'S'},
902 {"volup", IMX_GPIO_NR(7, 13), 'V'},
903 {"voldown", IMX_GPIO_NR(4, 5), 'v'},
907 * generate a null-terminated string containing the buttons pressed
908 * returns number of keys pressed
910 static int read_keys(char *buf)
912 int i, numpressed = 0;
913 for (i = 0; i < ARRAY_SIZE(buttons); i++) {
914 if (!gpio_get_value(buttons[i].gpnum))
915 buf[numpressed++] = buttons[i].ident;
917 buf[numpressed] = '\0';
921 static int do_kbd(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
923 char envvalue[ARRAY_SIZE(buttons)+1];
924 int numpressed = read_keys(envvalue);
925 env_set("keybd", envvalue);
926 return numpressed == 0;
931 "Tests for keypresses, sets 'keybd' environment variable",
932 "Returns 0 (true) to shell if key is pressed."
935 #ifdef CONFIG_PREBOOT
936 static char const kbd_magic_prefix[] = "key_magic";
937 static char const kbd_command_prefix[] = "key_cmd";
939 static void preboot_keys(void)
942 char keypress[ARRAY_SIZE(buttons)+1];
943 numpressed = read_keys(keypress);
945 char *kbd_magic_keys = env_get("magic_keys");
948 * loop over all magic keys
950 for (suffix = kbd_magic_keys; *suffix; ++suffix) {
952 char magic[sizeof(kbd_magic_prefix) + 1];
953 sprintf(magic, "%s%c", kbd_magic_prefix, *suffix);
954 keys = env_get(magic);
956 if (!strcmp(keys, keypress))
961 char cmd_name[sizeof(kbd_command_prefix) + 1];
963 sprintf(cmd_name, "%s%c", kbd_command_prefix, *suffix);
964 cmd = env_get(cmd_name);
966 env_set("preboot", cmd);
974 #ifdef CONFIG_CMD_BMODE
975 static const struct boot_mode board_boot_modes[] = {
976 /* 4 bit bus width */
977 {"mmc0", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)},
978 {"mmc1", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)},
983 int misc_init_r(void)
985 gpio_request(RGB_BACKLIGHT_GP, "lvds backlight");
986 gpio_request(LVDS_BACKLIGHT_GP, "lvds backlight");
987 gpio_request(GP_USB_OTG_PWR, "usbotg power");
988 gpio_request(IMX_GPIO_NR(7, 12), "usbh1 hub reset");
989 gpio_request(IMX_GPIO_NR(2, 2), "back");
990 gpio_request(IMX_GPIO_NR(2, 4), "home");
991 gpio_request(IMX_GPIO_NR(2, 1), "menu");
992 gpio_request(IMX_GPIO_NR(2, 3), "search");
993 gpio_request(IMX_GPIO_NR(7, 13), "volup");
994 gpio_request(IMX_GPIO_NR(4, 5), "voldown");
995 #ifdef CONFIG_PREBOOT
999 #ifdef CONFIG_CMD_BMODE
1000 add_board_boot_modes(board_boot_modes);
1002 env_set_hex("reset_cause", get_imx_reset_cause());