2 * U-boot - main board file
4 * Copyright (c) 2008-2011 Analog Devices Inc.
6 * Licensed under the GPL-2 or later.
10 #include <asm/blackfin.h>
13 #include "soft_switch.h"
15 struct switch_config {
16 uchar dir0; /* IODIRA */
17 uchar dir1; /* IODIRB */
18 uchar value0; /* OLATA */
19 uchar value1; /* OLATB */
22 static struct switch_config switch_config_array[NUM_SWITCH] = {
27 7--------------- RMII_CLK_EN | 7--------------- ~TEMP_THERM_EN
28 | 6------------- ~CNT0ZM_EN | | 6------------- ~TEMP_IRQ_EN
29 | | 5----------- ~CNT0DG_EN | | | 5----------- ~UART0CTS_146_EN
30 | | | 4--------- ~CNT0UD_EN | | | | 4--------- ~UART0CTS_RST_EN
31 | | | | 3------- ~CAN0RX_EN | | | | | 3------- ~UART0CTS_RTS_LPBK
32 | | | | | 2----- ~CAN0_ERR_EN | | | | | | 2----- ~UART0CTS_EN
33 | | | | | | 1--- ~CAN_STB | | | | | | | 1--- ~UART0RX_EN
34 | | | | | | | 0- CAN_EN | | | | | | | | 0- ~UART0RTS_EN
35 | | | | | | | | | | | | | | | | |
36 O O O O O O O O | O O O O O O O O (I/O direction)
37 1 0 0 0 0 0 1 1 | 1 1 1 1 1 0 0 0 (value being set)
39 .dir0 = 0x0, /* all output */
40 .dir1 = 0x0, /* all output */
41 .value0 = RMII_CLK_EN | CAN_STB | CAN_EN,
42 .value1 = TEMP_THERM_EN | TEMP_IRQ_EN | UART0CTS_146_EN
43 | UART0CTS_RST_EN | UART0CTS_RTS_LPBK,
49 7--------------- ~LED4_GPIO_EN | 7--------------- EMPTY
50 | 6------------- ~LED3_GPIO_EN | | 6------------- ~SPI0D3_EN
51 | | 5----------- ~LED2_GPIO_EN | | | 5----------- ~SPI0D2_EN
52 | | | 4--------- ~LED1_GPIO_EN | | | | 4--------- ~SPIFLASH_CS_EN
53 | | | | 3------- SMC0_LP0_EN | | | | | 3------- ~SD_WP_EN
54 | | | | | 2----- EMPTY | | | | | | 2----- ~SD_CD_EN
55 | | | | | | 1--- SMC0_EPPI2 | | | | | | | 1--- ~PUSHBUTTON2_EN
57 | | | | | | | 0- OVERRIDE_SMC0 | | | | | | | | 0- ~PUSHBUTTON1_EN
59 | | | | | | | | | | | | | | | | |
60 O O O O O O O O | O O O O O O O O (I/O direction)
61 0 0 0 0 0 X 0 1 | X 0 0 0 0 0 0 0 (value being set)
63 .dir0 = 0x0, /* all output */
64 .dir1 = 0x0, /* all output */
65 #ifdef CONFIG_BFIN_LINKPORT
66 .value0 = OVERRIDE_SMC0_LP0_BOOT,
68 .value0 = SMC0_EPPI2_LP1_SWITCH,
76 7--------------- ~PD2_SPI0MISO | 7--------------- EMPTY
78 | 6------------- ~PD1_SPI0D3 | | 6------------- EMPTY
82 | | 5----------- ~PD0_SPI0D2 | | | 5----------- EMPTY
86 | | | 4--------- ~WAKE_PUSH | | | | 4--------- EMPTY
88 | | | | 3------- ~ETHERNET_EN | | | | | 3------- EMPTY
89 | | | | | 2----- PHYAD0 | | | | | | 2----- EMPTY
90 | | | | | | 1--- PHY_PWR | | | | | | | 1--- ~PD4_SPI0CK_EI3_EN
92 | | | | | | | 0- ~PHYINT_EN | | | | | | | | 0- ~PD3_SPI0MOSI_EI3_EN
93 | | | | | | | | | | | | | | | | |
94 O O O O O I I O | O O O O O O O O (I/O direction)
95 1 1 1 0 0 0 0 0 | X X X X X X 1 1 (value being set)
97 .dir0 = 0x6, /* bits 1 and 2 input, all others output */
98 .dir1 = 0x0, /* all output */
99 .value0 = PD1_SPI0D3_EN | PD0_SPI0D2_EN,
104 static int setup_soft_switch(int addr, struct switch_config *config)
108 ret = i2c_write(addr, OLATA, 1, &config->value0, 1);
111 ret = i2c_write(addr, OLATB, 1, &config->value1, 1);
115 ret = i2c_write(addr, IODIRA, 1, &config->dir0, 1);
118 return i2c_write(addr, IODIRB, 1, &config->dir1, 1);
121 int config_switch_bit(int addr, int port, int bit, int dir, uchar value)
123 int ret, data_reg, dir_reg;
126 if (port == IO_PORT_A) {
134 if (dir == IO_PORT_INPUT) {
135 ret = i2c_read(addr, dir_reg, 1, &tmp, 1);
139 return i2c_write(addr, dir_reg, 1, &tmp, 1);
141 ret = i2c_read(addr, data_reg, 1, &tmp, 1);
148 ret = i2c_write(addr, data_reg, 1, &tmp, 1);
151 ret = i2c_read(addr, dir_reg, 1, &tmp, 1);
155 return i2c_write(addr, dir_reg, 1, &tmp, 1);
159 int setup_board_switches(void)
164 for (i = 0; i < NUM_SWITCH; i++) {
165 ret = setup_soft_switch(SWITCH_ADDR + i,
166 &switch_config_array[i]);