4 * Enter bugs at http://blackfin.uclinux.org/
6 * Copyright (c) 2005-2008 Analog Devices Inc.
8 * Licensed under the GPL-2 or later.
11 /* Configuration options:
12 * CONFIG_SPI_BAUD - value to load into SPI_BAUD (divisor of SCLK to get SPI CLK)
13 * CONFIG_SPI_FLASH_SLOW_READ - force usage of the slower read
14 * WARNING: make sure your SCLK + SPI_BAUD is slow enough
20 #include <asm/mach-common/bits/spi.h>
22 /* Forcibly phase out these */
23 #ifdef CONFIG_SPI_FLASH_NUM_SECTORS
24 # error do not set CONFIG_SPI_FLASH_NUM_SECTORS
26 #ifdef CONFIG_SPI_FLASH_SECTOR_SIZE
27 # error do not set CONFIG_SPI_FLASH_SECTOR_SIZE
30 #if defined(CONFIG_SPI)
39 /* SPI Speeds: 50 MHz / 33 MHz */
40 static struct flash_info flash_spansion_serial_flash[] = {
41 { "S25FL016", 0x0215, 64 * 1024, 32 },
42 { "S25FL032", 0x0216, 64 * 1024, 64 },
43 { "S25FL064", 0x0217, 64 * 1024, 128 },
44 { "S25FL0128", 0x0218, 256 * 1024, 64 },
48 /* SPI Speeds: 50 MHz / 20 MHz */
49 static struct flash_info flash_st_serial_flash[] = {
50 { "m25p05", 0x2010, 32 * 1024, 2 },
51 { "m25p10", 0x2011, 32 * 1024, 4 },
52 { "m25p20", 0x2012, 64 * 1024, 4 },
53 { "m25p40", 0x2013, 64 * 1024, 8 },
54 { "m25p16", 0x2015, 64 * 1024, 32 },
55 { "m25p32", 0x2016, 64 * 1024, 64 },
56 { "m25p64", 0x2017, 64 * 1024, 128 },
57 { "m25p128", 0x2018, 256 * 1024, 64 },
61 /* SPI Speeds: 66 MHz / 33 MHz */
62 static struct flash_info flash_atmel_dataflash[] = {
63 { "AT45DB011x", 0x0c, 264, 512 },
64 { "AT45DB021x", 0x14, 264, 1025 },
65 { "AT45DB041x", 0x1c, 264, 2048 },
66 { "AT45DB081x", 0x24, 264, 4096 },
67 { "AT45DB161x", 0x2c, 528, 4096 },
68 { "AT45DB321x", 0x34, 528, 8192 },
69 { "AT45DB642x", 0x3c, 1056, 8192 },
73 /* SPI Speed: 50 MHz / 25 MHz or 40 MHz / 20 MHz */
74 static struct flash_info flash_winbond_serial_flash[] = {
75 { "W25X10", 0x3011, 16 * 256, 32 },
76 { "W25X20", 0x3012, 16 * 256, 64 },
77 { "W25X40", 0x3013, 16 * 256, 128 },
78 { "W25X80", 0x3014, 16 * 256, 256 },
79 { "W25P80", 0x2014, 256 * 256, 16 },
80 { "W25P16", 0x2015, 256 * 256, 32 },
85 uint8_t read, write, erase, status;
88 #ifdef CONFIG_SPI_FLASH_SLOW_READ
93 static struct flash_ops flash_st_ops = {
100 static struct flash_ops flash_atmel_ops = {
107 static struct flash_ops flash_winbond_ops = {
114 struct manufacturer_info {
117 struct flash_info *flashes;
118 struct flash_ops *ops;
122 struct manufacturer_info *manufacturer;
123 struct flash_info *flash;
124 struct flash_ops *ops;
125 uint8_t manufacturer_id, device_id1, device_id2;
126 unsigned int write_length;
127 unsigned long sector_size, num_sectors;
131 JED_MANU_SPANSION = 0x01,
133 JED_MANU_ATMEL = 0x1F,
134 JED_MANU_WINBOND = 0xEF,
137 static struct manufacturer_info flash_manufacturers[] = {
140 .id = JED_MANU_SPANSION,
141 .flashes = flash_spansion_serial_flash,
142 .ops = &flash_st_ops,
147 .flashes = flash_st_serial_flash,
148 .ops = &flash_st_ops,
152 .id = JED_MANU_ATMEL,
153 .flashes = flash_atmel_dataflash,
154 .ops = &flash_atmel_ops,
158 .id = JED_MANU_WINBOND,
159 .flashes = flash_winbond_serial_flash,
160 .ops = &flash_winbond_ops,
164 #define TIMEOUT 5000 /* timeout of 5 seconds */
166 /* If part has multiple SPI flashes, assume SPI0 as that is
167 * the one we can boot off of ...
170 # define pSPI_CTL pSPI0_CTL
171 # define pSPI_BAUD pSPI0_BAUD
172 # define pSPI_FLG pSPI0_FLG
173 # define pSPI_RDBR pSPI0_RDBR
174 # define pSPI_STAT pSPI0_STAT
175 # define pSPI_TDBR pSPI0_TDBR
178 /* Default to the SPI SSEL that we boot off of:
179 * BF54x, BF537, (everything new?): SSEL1
180 * BF51x, BF533, BF561: SSEL2
182 #ifndef CONFIG_SPI_FLASH_SSEL
183 # define CONFIG_SPI_FLASH_SSEL BFIN_BOOT_SPI_SSEL
185 #define SSEL_MASK (1 << CONFIG_SPI_FLASH_SSEL)
187 static void SPI_INIT(void)
189 /* [#3541] This delay appears to be necessary, but not sure
190 * exactly why as the history behind it is non-existant.
192 udelay(CONFIG_CCLK_HZ / 25000000);
194 /* enable SPI pins: SSEL, MOSI, MISO, SCK */
196 *pPORTE_FER |= (PE0 | PE1 | PE2 | PE4);
197 #elif defined(__ADSPBF534__) || defined(__ADSPBF536__) || defined(__ADSPBF537__)
198 *pPORTF_FER |= (PF10 | PF11 | PF12 | PF13);
199 #elif defined(__ADSPBF52x__)
200 bfin_write_PORTG_MUX((bfin_read_PORTG_MUX() & ~PORT_x_MUX_0_MASK) | PORT_x_MUX_0_FUNC_3);
201 bfin_write_PORTG_FER(bfin_read_PORTG_FER() | PG1 | PG2 | PG3 | PG4);
202 #elif defined(__ADSPBF51x__)
203 bfin_write_PORTG_MUX((bfin_read_PORTG_MUX() & ~PORT_x_MUX_7_MASK) | PORT_x_MUX_7_FUNC_1);
204 bfin_write_PORTG_FER(bfin_read_PORTG_FER() | PG12 | PG13 | PG14 | PG15);
207 /* initate communication upon write of TDBR */
208 *pSPI_CTL = (SPE|MSTR|CPHA|CPOL|0x01);
209 *pSPI_BAUD = CONFIG_SPI_BAUD;
212 static void SPI_DEINIT(void)
214 /* put SPI settings back to reset state */
220 static void SPI_ON(void)
222 /* toggle SSEL to reset the device so it'll take a new command */
223 *pSPI_FLG = 0xFF00 | SSEL_MASK;
226 *pSPI_FLG = ((0xFF & ~SSEL_MASK) << 8) | SSEL_MASK;
230 static void SPI_OFF(void)
232 /* put SPI settings back to reset state */
237 static uint8_t spi_write_read_byte(uint8_t transmit)
239 *pSPI_TDBR = transmit;
242 while ((*pSPI_STAT & TXS))
245 while (!(*pSPI_STAT & SPIF))
248 while (!(*pSPI_STAT & RXS))
252 /* Read dummy to empty the receive register */
256 static uint8_t read_status_register(void)
258 uint8_t status_register;
260 /* send instruction to read status register */
262 spi_write_read_byte(flash.ops->status);
263 /* send dummy to receive the status register */
264 status_register = spi_write_read_byte(0);
267 return status_register;
270 static int wait_for_ready_status(void)
272 ulong start = get_timer(0);
274 while (get_timer(0) - start < TIMEOUT) {
275 switch (flash.manufacturer_id) {
276 case JED_MANU_SPANSION:
278 case JED_MANU_WINBOND:
279 if (!(read_status_register() & 0x01))
284 if (read_status_register() & 0x80)
299 /* Request and read the manufacturer and device id of parts which
300 * are compatible with the JEDEC standard (JEP106) and use that to
301 * setup other operating conditions.
303 static int spi_detect_part(void)
308 static char called_init;
314 /* Send the request for the part identification */
315 spi_write_read_byte(0x9F);
317 /* Now read in the manufacturer id bytes */
319 flash.manufacturer_id = spi_write_read_byte(0);
320 if (flash.manufacturer_id == 0x7F)
321 puts("Warning: unhandled manufacturer continuation byte!\n");
322 } while (flash.manufacturer_id == 0x7F);
324 /* Now read in the first device id byte */
325 flash.device_id1 = spi_write_read_byte(0);
327 /* Now read in the second device id byte */
328 flash.device_id2 = spi_write_read_byte(0);
332 dev_id = (flash.device_id1 << 8) | flash.device_id2;
334 for (i = 0; i < ARRAY_SIZE(flash_manufacturers); ++i) {
335 if (flash.manufacturer_id == flash_manufacturers[i].id)
338 if (i == ARRAY_SIZE(flash_manufacturers))
341 flash.manufacturer = &flash_manufacturers[i];
342 flash.ops = flash_manufacturers[i].ops;
344 switch (flash.manufacturer_id) {
345 case JED_MANU_SPANSION:
347 case JED_MANU_WINBOND:
348 for (i = 0; flash.manufacturer->flashes[i].name; ++i) {
349 if (dev_id == flash.manufacturer->flashes[i].id)
352 if (!flash.manufacturer->flashes[i].name)
355 flash.flash = &flash.manufacturer->flashes[i];
356 flash.sector_size = flash.flash->sector_size;
357 flash.num_sectors = flash.flash->num_sectors;
358 flash.write_length = 256;
361 case JED_MANU_ATMEL: {
362 uint8_t status = read_status_register();
364 for (i = 0; flash.manufacturer->flashes[i].name; ++i) {
365 if ((status & 0x3c) == flash.manufacturer->flashes[i].id)
368 if (!flash.manufacturer->flashes[i].name)
371 flash.flash = &flash.manufacturer->flashes[i];
372 flash.sector_size = flash.flash->sector_size;
373 flash.num_sectors = flash.flash->num_sectors;
375 /* see if flash is in "power of 2" mode */
377 flash.sector_size &= ~(1 << (ffs(flash.sector_size) - 1));
379 flash.write_length = flash.sector_size;
388 printf("Unknown SPI device: 0x%02X 0x%02X 0x%02X\n",
389 flash.manufacturer_id, flash.device_id1, flash.device_id2);
394 * Function: spi_init_f
395 * Description: Init SPI-Controller (ROM part)
398 void spi_init_f(void)
403 * Function: spi_init_r
404 * Description: Init SPI-Controller (RAM part) -
405 * The malloc engine is ready and we can move our buffers to
409 void spi_init_r(void)
411 #if defined(CONFIG_POST) && (CONFIG_POST & CONFIG_SYS_POST_SPI)
412 /* Our testing strategy here is pretty basic:
413 * - fill src memory with an 8-bit pattern
414 * - write the src memory to the SPI flash
415 * - read the SPI flash into the dst memory
416 * - compare src and dst memory regions
417 * - repeat a few times
418 * The variations we test for:
419 * - change the 8-bit pattern a bit
420 * - change the read/write block size so we know:
421 * - writes smaller/equal/larger than the buffer work
422 * - writes smaller/equal/larger than the sector work
423 * - change the SPI offsets so we know:
424 * - writing partial sectors works
426 uint8_t *mem_src, *mem_dst;
428 size_t test_count, errors;
433 if (spi_detect_part())
439 flash.write_length * 2,
440 flash.write_length / 2,
442 flash.sector_size * 2,
443 flash.sector_size / 2
448 flash.write_length * 2,
449 flash.write_length / 2,
450 flash.write_length / 4,
452 flash.sector_size * 2,
453 flash.sector_size / 2,
454 flash.sector_size / 4,
457 /* the exact addresses are arbitrary ... they just need to not overlap */
458 mem_src = (void *)(0);
459 mem_dst = (void *)(max(flash.write_length, flash.sector_size) * 2);
465 for (i = 0; i < 16; ++i) { /* 16 = 8 bits * 2 iterations */
466 for (l = 0; l < ARRAY_SIZE(lengths); ++l) {
467 for (o = 0; o < ARRAY_SIZE(offsets); ++o) {
468 ulong len = lengths[l];
469 ulong off = offsets[o];
471 printf("Testing pattern 0x%02X of length %5lu and offset %5lu: ", pattern, len, off);
473 /* setup the source memory region */
474 memset(mem_src, pattern, len);
477 for (c = 0; c < 4; ++c) { /* 4 is just a random repeat count */
483 /* make sure background fill pattern != pattern */
484 memset(mem_dst, pattern ^ 0xFF, len);
486 /* write out the source memory and then read it back and compare */
487 eeprom_write(0, off, mem_src, len);
488 eeprom_read(0, off, mem_dst, len);
490 if (memcmp(mem_src, mem_dst, len)) {
491 for (c = 0; c < len; ++c)
492 if (mem_src[c] != mem_dst[c])
494 printf(" FAIL @ offset %u, skipping repeats ", c);
499 /* XXX: should shrink write region here to test with
500 * leading/trailing canaries so we know surrounding
501 * bytes don't get screwed.
508 /* invert the pattern every other run and shift out bits slowly */
511 pattern = (pattern | 0x01) << 1;
515 printf("SPI FAIL: Out of %i tests, there were %i errors ;(\n", test_count, errors);
517 printf("SPI PASS: %i tests worked!\n", test_count);
525 static void transmit_address(uint32_t addr)
527 /* Send the highest byte of the 24 bit address at first */
528 spi_write_read_byte(addr >> 16);
529 /* Send the middle byte of the 24 bit address at second */
530 spi_write_read_byte(addr >> 8);
531 /* Send the lowest byte of the 24 bit address finally */
532 spi_write_read_byte(addr);
536 * Read a value from flash for verify purpose
537 * Inputs: unsigned long ulStart - holds the SPI start address
538 * int pnData - pointer to store value read from flash
539 * long lCount - number of elements to read
541 static int read_flash(unsigned long address, long count, uchar *buffer)
545 /* Send the read command to SPI device */
547 spi_write_read_byte(flash.ops->read);
548 transmit_address(address);
550 #ifndef CONFIG_SPI_FLASH_SLOW_READ
551 /* Send dummy byte when doing SPI fast reads */
552 spi_write_read_byte(0);
555 /* After the SPI device address has been placed on the MOSI pin the data can be */
556 /* received on the MISO pin. */
557 for (i = 1; i <= count; ++i) {
558 *buffer++ = spi_write_read_byte(0);
559 if (i % flash.sector_size == 0)
568 static int enable_writing(void)
572 if (flash.manufacturer_id == JED_MANU_ATMEL)
575 /* A write enable instruction must previously have been executed */
577 spi_write_read_byte(0x06);
580 /* The status register will be polled to check the write enable latch "WREN" */
581 start = get_timer(0);
582 while (get_timer(0) - start < TIMEOUT) {
583 if (read_status_register() & 0x02)
596 static long address_to_sector(unsigned long address)
598 if (address > (flash.num_sectors * flash.sector_size) - 1)
600 return address / flash.sector_size;
603 static int erase_sector(int address)
605 /* sector gets checked in higher function, so assume it's valid
606 * here and figure out the offset of the sector in flash
608 if (enable_writing())
612 * Send the erase block command to the flash followed by the 24 address
613 * to point to the start of a sector
616 spi_write_read_byte(flash.ops->erase);
617 transmit_address(address);
620 return wait_for_ready_status();
623 /* Write [count] bytes out of [buffer] into the given SPI [address] */
624 static long write_flash(unsigned long address, long count, uchar *buffer)
626 long i, write_buffer_size;
628 if (enable_writing())
631 /* Send write command followed by the 24 bit address */
633 spi_write_read_byte(flash.ops->write);
634 transmit_address(address);
636 /* Shoot out a single write buffer */
637 write_buffer_size = min(count, flash.write_length);
638 for (i = 0; i < write_buffer_size; ++i)
639 spi_write_read_byte(buffer[i]);
643 /* Wait for the flash to do its thing */
644 if (wait_for_ready_status()) {
645 puts("SPI Program Time out! ");
652 /* Write [count] bytes out of [buffer] into the given SPI [address] */
653 static int write_sector(unsigned long address, long count, uchar *buffer)
658 write_cnt = write_flash(address, count, buffer);
662 /* Now that we've sent some bytes out to the flash, update
666 address += write_cnt;
670 /* return the appropriate error code */
675 * Function: spi_write
677 ssize_t spi_write(uchar *addr, int alen, uchar *buffer, int len)
679 unsigned long offset;
680 int start_sector, end_sector;
681 int start_byte, end_byte;
687 if (spi_detect_part())
690 offset = addr[0] << 16 | addr[1] << 8 | addr[2];
692 /* Get the start block number */
693 start_sector = address_to_sector(offset);
694 if (start_sector == -1) {
695 puts("Invalid sector! ");
698 end_sector = address_to_sector(offset + len - 1);
699 if (end_sector == -1) {
700 puts("Invalid sector! ");
704 /* Since flashes operate in sector units but the eeprom command
705 * operates as a continuous stream of bytes, we need to emulate
706 * the eeprom behavior. So here we read in the sector, overlay
707 * any bytes we're actually modifying, erase the sector, and
708 * then write back out the new sector.
710 temp = malloc(flash.sector_size);
712 puts("Malloc for sector failed! ");
716 for (num = start_sector; num <= end_sector; num++) {
717 unsigned long address = num * flash.sector_size;
719 /* XXX: should add an optimization when spanning sectors:
720 * No point in reading in a sector if we're going to be
721 * clobbering the whole thing. Need to also add a test
722 * case to make sure the optimization is correct.
724 if (read_flash(address, flash.sector_size, temp)) {
725 puts("Read sector failed! ");
730 start_byte = max(address, offset);
731 end_byte = address + flash.sector_size - 1;
732 if (end_byte > (offset + len))
733 end_byte = (offset + len - 1);
735 memcpy(temp + start_byte - address,
736 buffer + start_byte - offset,
737 end_byte - start_byte + 1);
739 if (erase_sector(address)) {
740 puts("Erase sector failed! ");
744 if (write_sector(address, flash.sector_size, temp)) {
745 puts("Write sector failed! ");
765 ssize_t spi_read(uchar *addr, int alen, uchar *buffer, int len)
767 unsigned long offset;
771 if (spi_detect_part())
774 offset = addr[0] << 16 | addr[1] << 8 | addr[2];
775 read_flash(offset, len, buffer);
784 * Spit out some useful information about the SPI eeprom
786 int eeprom_info(void)
792 if (spi_detect_part())
795 printf("SPI Device: %s 0x%02X (%s) 0x%02X 0x%02X\n"
796 "Parameters: num sectors = %lu, sector size = %lu, write size = %i\n"
797 "Flash Size: %lu mbit (%lu mbyte)\n"
799 flash.flash->name, flash.manufacturer_id, flash.manufacturer->name,
800 flash.device_id1, flash.device_id2, flash.num_sectors,
801 flash.sector_size, flash.write_length,
802 (flash.num_sectors * flash.sector_size) >> 17,
803 (flash.num_sectors * flash.sector_size) >> 20,
804 read_status_register());