board/atmel/at91sam9263ek/at91sam9263ek.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2007-2008
   4  * Stelian Pop <stelian@popies.net>
   5  * Lead Tech Design <www.leadtechdesign.com>
   6  */
   7
   8 #include <config.h>
   9 #include <debug_uart.h>
  10 #include <init.h>
  11 #include <net.h>
  12 #include <vsprintf.h>
  13 #include <asm/global_data.h>
  14 #include <linux/sizes.h>
  15 #include <asm/arch/at91sam9263.h>
  16 #include <asm/arch/at91sam9_smc.h>
  17 #include <asm/arch/at91_common.h>
  18 #include <asm/arch/at91_matrix.h>
  19 #include <asm/arch/at91_pio.h>
  20 #include <asm/arch/clk.h>
  21 #include <asm/io.h>
  22 #include <asm/arch/gpio.h>
  23 #include <asm/arch/hardware.h>
  24 #include <atmel_lcdc.h>
  25 #include <asm/mach-types.h>
  26
  27 DECLARE_GLOBAL_DATA_PTR;
  28
  29 /* ------------------------------------------------------------------------- */
  30 /*
  31  * Miscelaneous platform dependent initialisations
  32  */
  33
  34 #ifdef CONFIG_CMD_NAND
  35 static void at91sam9263ek_nand_hw_init(void)
  36 {
  37         unsigned long csa;
  38         at91_smc_t    *smc    = (at91_smc_t *) ATMEL_BASE_SMC0;
  39         at91_matrix_t *matrix = (at91_matrix_t *) ATMEL_BASE_MATRIX;
  40
  41         /* Enable CS3 */
  42         csa = readl(&matrix->csa[0]) | AT91_MATRIX_CSA_EBI_CS3A;
  43         writel(csa, &matrix->csa[0]);
  44
  45         /* Enable CS3 */
  46
  47         /* Configure SMC CS3 for NAND/SmartMedia */
  48         writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
  49                 AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
  50                 &smc->cs[3].setup);
  51
  52         writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
  53                 AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
  54                 &smc->cs[3].pulse);
  55
  56         writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
  57                 &smc->cs[3].cycle);
  58         writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
  59                 AT91_SMC_MODE_EXNW_DISABLE |
  60 #ifdef CONFIG_SYS_NAND_DBW_16
  61                        AT91_SMC_MODE_DBW_16 |
  62 #else /* CONFIG_SYS_NAND_DBW_8 */
  63                        AT91_SMC_MODE_DBW_8 |
  64 #endif
  65                        AT91_SMC_MODE_TDF_CYCLE(2),
  66                 &smc->cs[3].mode);
  67
  68         at91_periph_clk_enable(ATMEL_ID_PIOA);
  69         at91_periph_clk_enable(ATMEL_ID_PIOCDE);
  70
  71         /* Configure RDY/BSY */
  72         at91_set_gpio_input(CFG_SYS_NAND_READY_PIN, 1);
  73
  74         /* Enable NandFlash */
  75         at91_set_gpio_output(CFG_SYS_NAND_ENABLE_PIN, 1);
  76 }
  77 #endif
  78
  79 #ifdef CONFIG_DEBUG_UART_BOARD_INIT
  80 void board_debug_uart_init(void)
  81 {
  82         at91_seriald_hw_init();
  83 }
  84 #endif
  85
  86 #ifdef CONFIG_BOARD_EARLY_INIT_F
  87 int board_early_init_f(void)
  88 {
  89         return 0;
  90 }
  91 #endif
  92
  93 int board_init(void)
  94 {
  95         /* arch number of AT91SAM9263EK-Board */
  96         gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9263EK;
  97         /* adress of boot parameters */
  98         gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
  99
 100 #ifdef CONFIG_CMD_NAND
 101         at91sam9263ek_nand_hw_init();
 102 #endif
 103 #ifdef CONFIG_USB_OHCI_NEW
 104         at91_uhp_hw_init();
 105 #endif
 106         return 0;
 107 }
 108
 109 int dram_init(void)
 110 {
 111         gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
 112                 CFG_SYS_SDRAM_SIZE);
 113
 114         return 0;
 115 }
 116
 117 #ifdef CONFIG_RESET_PHY_R
 118 void reset_phy(void)
 119 {
 120 }
 121 #endif