board/atmel/at91sam9260ek/at91sam9260ek.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2007-2008
   4  * Stelian Pop <stelian@popies.net>
   5  * Lead Tech Design <www.leadtechdesign.com>
   6  */
   7
   8 #include <common.h>
   9 #include <debug_uart.h>
  10 #include <init.h>
  11 #include <net.h>
  12 #include <asm/io.h>
  13 #include <asm/arch/at91sam9260_matrix.h>
  14 #include <asm/arch/at91sam9_smc.h>
  15 #include <asm/arch/at91_common.h>
  16 #include <asm/arch/clk.h>
  17 #include <asm/arch/gpio.h>
  18
  19 DECLARE_GLOBAL_DATA_PTR;
  20
  21 /* ------------------------------------------------------------------------- */
  22 /*
  23  * Miscelaneous platform dependent initialisations
  24  */
  25
  26 #ifdef CONFIG_CMD_NAND
  27 static void at91sam9260ek_nand_hw_init(void)
  28 {
  29         struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
  30         struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
  31         unsigned long csa;
  32
  33         /* Assign CS3 to NAND/SmartMedia Interface */
  34         csa = readl(&matrix->ebicsa);
  35         csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
  36         writel(csa, &matrix->ebicsa);
  37
  38         /* Configure SMC CS3 for NAND/SmartMedia */
  39         writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
  40                 AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
  41                 &smc->cs[3].setup);
  42         writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
  43                 AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
  44                 &smc->cs[3].pulse);
  45         writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
  46                 &smc->cs[3].cycle);
  47         writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
  48                 AT91_SMC_MODE_EXNW_DISABLE |
  49 #ifdef CONFIG_SYS_NAND_DBW_16
  50                 AT91_SMC_MODE_DBW_16 |
  51 #else /* CONFIG_SYS_NAND_DBW_8 */
  52                 AT91_SMC_MODE_DBW_8 |
  53 #endif
  54                 AT91_SMC_MODE_TDF_CYCLE(2),
  55                 &smc->cs[3].mode);
  56
  57         /* Configure RDY/BSY */
  58         at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
  59
  60         /* Enable NandFlash */
  61         at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
  62
  63 }
  64 #endif
  65
  66 #ifdef CONFIG_DEBUG_UART_BOARD_INIT
  67 void board_debug_uart_init(void)
  68 {
  69         at91_seriald_hw_init();
  70 }
  71 #endif
  72
  73 #ifdef CONFIG_BOARD_EARLY_INIT_F
  74 int board_early_init_f(void)
  75 {
  76 #ifdef CONFIG_DEBUG_UART
  77         debug_uart_init();
  78 #endif
  79         return 0;
  80 }
  81 #endif
  82
  83 int board_init(void)
  84 {
  85         /* adress of boot parameters */
  86         gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
  87
  88 #ifdef CONFIG_CMD_NAND
  89         at91sam9260ek_nand_hw_init();
  90 #endif
  91         return 0;
  92 }
  93
  94 int dram_init(void)
  95 {
  96         gd->ram_size = get_ram_size(
  97                 (void *)CONFIG_SYS_SDRAM_BASE,
  98                 CONFIG_SYS_SDRAM_SIZE);
  99         return 0;
 100 }
 101
 102 #ifdef CONFIG_RESET_PHY_R
 103 void reset_phy(void)
 104 {
 105 }
 106 #endif