1 // SPDX-License-Identifier: GPL-2.0+
4 * David Feng <fenghua@phytium.com.cn>
5 * Sharma Bhupesh <bhupesh.sharma@freescale.com>
16 #include <linux/compiler.h>
17 #include <dm/platform_data/serial_pl01x.h>
19 #include <asm/armv8/mmu.h>
21 DECLARE_GLOBAL_DATA_PTR;
23 static const struct pl01x_serial_platdata serial_platdata = {
26 .clock = CONFIG_PL011_CLOCK,
29 U_BOOT_DEVICE(vexpress_serials) = {
30 .name = "serial_pl01x",
31 .platdata = &serial_platdata,
34 static struct mm_region vexpress64_mem_map[] = {
39 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
41 PTE_BLOCK_PXN | PTE_BLOCK_UXN
45 .size = 0xff80000000UL,
46 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
54 struct mm_region *mem_map = vexpress64_mem_map;
56 /* This function gets replaced by platforms supporting PCIe.
57 * The replacement function, eg. on Juno, initialises the PCIe bus.
59 __weak void vexpress64_pcie_init(void)
65 vexpress64_pcie_init();
71 gd->ram_size = PHYS_SDRAM_1_SIZE;
75 int dram_init_banksize(void)
77 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
78 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
80 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
81 gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
87 #ifdef CONFIG_OF_BOARD
88 #define JUNO_FLASH_SEC_SIZE (256 * 1024)
89 static phys_addr_t find_dtb_in_nor_flash(const char *partname)
91 phys_addr_t sector = CONFIG_SYS_FLASH_BASE;
95 i < CONFIG_SYS_MAX_FLASH_SECT;
96 i++, sector += JUNO_FLASH_SEC_SIZE) {
97 int len = strlen(partname) + 1;
102 reg = readl(sector + JUNO_FLASH_SEC_SIZE - 0x04);
103 /* This makes up the string "HSLFTOOF" flash footer */
104 if (reg != 0x464F4F54U)
106 reg = readl(sector + JUNO_FLASH_SEC_SIZE - 0x08);
107 if (reg != 0x464C5348U)
110 for (offs = 0; offs < 32; offs += 4, len -= 4) {
111 reg = readl(sector + JUNO_FLASH_SEC_SIZE - 0x30 + offs);
112 if (strncmp(partname + offs, (char *)®,
119 reg = readl(sector + JUNO_FLASH_SEC_SIZE - 0x10);
120 imginfo = sector + JUNO_FLASH_SEC_SIZE - 0x30 - reg;
121 reg = readl(imginfo + 0x54);
123 return CONFIG_SYS_FLASH_BASE +
124 reg * JUNO_FLASH_SEC_SIZE;
128 printf("No DTB found\n");
133 void *board_fdt_blob_setup(void)
135 phys_addr_t fdt_rom_addr = find_dtb_in_nor_flash(CONFIG_JUNO_DTB_PART);
137 if (fdt_rom_addr == ~0UL)
140 return (void *)fdt_rom_addr;
144 /* Actual reset is done via PSCI. */
145 void reset_cpu(ulong addr)
150 * Board specific ethernet initialization routine.
152 int board_eth_init(bd_t *bis)
155 #ifndef CONFIG_DM_ETH
156 #ifdef CONFIG_SMC91111
157 rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
159 #ifdef CONFIG_SMC911X
160 rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);