board/armltd/total_compute/total_compute.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2020 Arm Limited
   4  * Usama Arif <usama.arif@arm.com>
   5  */
   6
   7 #include <common.h>
   8 #include <dm.h>
   9 #include <dm/platform_data/serial_pl01x.h>
  10 #include <asm/armv8/mmu.h>
  11
  12 static const struct pl01x_serial_platdata serial_platdata = {
  13         .base = UART0_BASE,
  14         .type = TYPE_PL011,
  15         .clock = CONFIG_PL011_CLOCK,
  16 };
  17
  18 U_BOOT_DEVICE(total_compute_serials) = {
  19         .name = "serial_pl01x",
  20         .platdata = &serial_platdata,
  21 };
  22
  23 static struct mm_region total_compute_mem_map[] = {
  24         {
  25                 .virt = 0x0UL,
  26                 .phys = 0x0UL,
  27                 .size = 0x80000000UL,
  28                 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
  29                          PTE_BLOCK_NON_SHARE |
  30                          PTE_BLOCK_PXN | PTE_BLOCK_UXN
  31         }, {
  32                 .virt = 0x80000000UL,
  33                 .phys = 0x80000000UL,
  34                 .size = 0xff80000000UL,
  35                 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
  36                          PTE_BLOCK_INNER_SHARE
  37         }, {
  38                 /* List terminator */
  39                 0,
  40         }
  41 };
  42
  43 struct mm_region *mem_map = total_compute_mem_map;
  44
  45 int board_init(void)
  46 {
  47         return 0;
  48 }
  49
  50 int dram_init(void)
  51 {
  52         gd->ram_size = PHYS_SDRAM_1_SIZE;
  53         return 0;
  54 }
  55
  56 int dram_init_banksize(void)
  57 {
  58         gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
  59         gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
  60
  61         return 0;
  62 }
  63
  64 /* Nothing to be done here as handled by PSCI interface */
  65 void reset_cpu(ulong addr)
  66 {
  67 }