board/amcc/sequoia/sequoia.h

   1 /*
   2  * (C) Copyright 2006
   3  * Stefan Roese, DENX Software Engineering, sr@denx.de.
   4  *
   5  * (C) Copyright 2006
   6  * Jacqueline Pira-Ferriol, AMCC/IBM, jpira-ferriol@fr.ibm.com
   7  * Alain Saurel,            AMCC/IBM, alain.saurel@fr.ibm.com
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License as
  11  * published by the Free Software Foundation; either version 2 of
  12  * the License, or (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22  * MA 02111-1307 USA
  23  */
  24
  25
  26 /*----------------------------------------------------------------------------+
  27   | EBC Configuration Register - EBC0_CFG
  28   +----------------------------------------------------------------------------*/
  29 /* External Bus Three-State Control */
  30 #define EBC0_CFG_EBTC_DRIVEN        0x80000000
  31 /* Device-Paced Time-out Disable */
  32 #define EBC0_CFG_PTD_ENABLED        0x00000000
  33 /* Ready Timeout Count */
  34 #define EBC0_CFG_RTC_MASK           0x38000000
  35 #define EBC0_CFG_RTC_16PERCLK       0x00000000
  36 #define EBC0_CFG_RTC_32PERCLK       0x08000000
  37 #define EBC0_CFG_RTC_64PERCLK       0x10000000
  38 #define EBC0_CFG_RTC_128PERCLK      0x18000000
  39 #define EBC0_CFG_RTC_256PERCLK      0x20000000
  40 #define EBC0_CFG_RTC_512PERCLK      0x28000000
  41 #define EBC0_CFG_RTC_1024PERCLK     0x30000000
  42 #define EBC0_CFG_RTC_2048PERCLK     0x38000000
  43 /* External Master Priority Low */
  44 #define EBC0_CFG_EMPL_LOW           0x00000000
  45 #define EBC0_CFG_EMPL_MEDIUM_LOW    0x02000000
  46 #define EBC0_CFG_EMPL_MEDIUM_HIGH   0x04000000
  47 #define EBC0_CFG_EMPL_HIGH          0x06000000
  48 /* External Master Priority High */
  49 #define EBC0_CFG_EMPH_LOW           0x00000000
  50 #define EBC0_CFG_EMPH_MEDIUM_LOW    0x00800000
  51 #define EBC0_CFG_EMPH_MEDIUM_HIGH   0x01000000
  52 #define EBC0_CFG_EMPH_HIGH          0x01800000
  53 /* Chip Select Three-State Control */
  54 #define EBC0_CFG_CSTC_DRIVEN        0x00400000
  55 /* Burst Prefetch */
  56 #define EBC0_CFG_BPF_ONEDW          0x00000000
  57 #define EBC0_CFG_BPF_TWODW          0x00100000
  58 #define EBC0_CFG_BPF_FOURDW         0x00200000
  59 /* External Master Size */
  60 #define EBC0_CFG_EMS_8BIT           0x00000000
  61 /* Power Management Enable */
  62 #define EBC0_CFG_PME_DISABLED       0x00000000
  63 #define EBC0_CFG_PME_ENABLED        0x00020000
  64 /* Power Management Timer */
  65 #define EBC0_CFG_PMT_ENCODE(n)          ((((unsigned long)(n))&0x1F)<<12)
  66
  67 #define SDR0_USB0                    0x0320     /* USB Control Register */